From 1a7640dc628c39b3af24983eb90474962c096119 Mon Sep 17 00:00:00 2001 From: Paul Menzel Date: Fri, 5 Mar 2021 01:09:07 +0100 Subject: [PATCH] vc/amd/sb800: Fix out of bounds shift MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix the two issues below. SB800: sb_Before_Pci_Init shift out of bounds src/vendorcode/amd/cimx/sb800/PCILIB.c:49:18 ubsan: unrecoverable error. SB800: sb_Before_Pci_Init shift out of bounds src/vendorcode/amd/cimx/sb800/PCILIB.c:66:18 ubsan: unrecoverable error. Found by: UBSAN Change-Id: Id42e62d35f59793bad10998f14422ab7fb4fc029 Signed-off-by: Paul Menzel Reviewed-on: https://review.coreboot.org/c/coreboot/+/51283 Tested-by: build bot (Jenkins) Reviewed-by: Michał Żygowski --- src/vendorcode/amd/cimx/sb800/PCILIB.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/vendorcode/amd/cimx/sb800/PCILIB.c b/src/vendorcode/amd/cimx/sb800/PCILIB.c index 01be81a6e5..c34c5b0dc9 100644 --- a/src/vendorcode/amd/cimx/sb800/PCILIB.c +++ b/src/vendorcode/amd/cimx/sb800/PCILIB.c @@ -46,7 +46,7 @@ ReadPCI ( if ( (UINT16)Address < 0xff ) { //Normal Config Access UINT32 AddrCf8; - AddrCf8 = (1 << 31) + ((Address >> 8) & 0x0FFFF00) + (Address & 0xFC); + AddrCf8 = (1U << 31) + ((Address >> 8) & 0x0FFFF00) + (Address & 0xFC); WriteIO (0xCf8, AccWidthUint32, &AddrCf8); ReadIO ((UINT16) (0xCfC + (Address & 0x3)), OpFlag, Value); } @@ -63,7 +63,7 @@ WritePCI ( if ( (UINT16)Address < 0xff ) { //Normal Config Access UINT32 AddrCf8; - AddrCf8 = (1 << 31) + ((Address >> 8)&0x0FFFF00) + (Address & 0xFC); + AddrCf8 = (1U << 31) + ((Address >> 8)&0x0FFFF00) + (Address & 0xFC); WriteIO (0xCf8, AccWidthUint32, &AddrCf8); WriteIO ((UINT16) (0xCfC + (Address & 0x3)), OpFlag, Value); }