diff --git a/Makefile b/Makefile index e8e7b57fb5..459f724e9b 100644 --- a/Makefile +++ b/Makefile @@ -190,10 +190,6 @@ endif # are reproducible export LANG LC_ALL TZ SOURCE_DATE_EPOCH -ifneq ($(CONFIG_MMX),y) -CFLAGS_x86_32 += -mno-mmx -endif - ifneq ($(UNIT_TEST),1) include toolchain.inc endif diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig index 297b1a125e..7d315a46b7 100644 --- a/src/cpu/Kconfig +++ b/src/cpu/Kconfig @@ -27,12 +27,6 @@ config SMP This option is used to enable certain functions to make coreboot work correctly on symmetric multi processor (SMP) systems. -config MMX - bool - help - Select MMX in your socket or model Kconfig if your CPU has MMX - streaming SIMD instructions. - config SSE bool help diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index da7d1ab36b..5b4f6fc752 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -7,7 +7,6 @@ if CPU_INTEL_HASWELL config CPU_SPECIFIC_OPTIONS def_bool y select ARCH_X86 - select MMX select SSE2 select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index 032450dd32..479dbbb223 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -7,7 +7,6 @@ config CPU_SPECIFIC_OPTIONS def_bool y select ARCH_X86 select HAVE_EXP_X86_64_SUPPORT if USE_NATIVE_RAMINIT - select MMX select SSE2 select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/intel/socket_441/Kconfig b/src/cpu/intel/socket_441/Kconfig index 2ff419b2a0..ca6990db23 100644 --- a/src/cpu/intel/socket_441/Kconfig +++ b/src/cpu/intel/socket_441/Kconfig @@ -6,7 +6,6 @@ if CPU_INTEL_SOCKET_441 config SOCKET_SPECIFIC_OPTIONS def_bool y select CPU_INTEL_MODEL_106CX - select MMX select SETUP_XIP_CACHE config DCACHE_RAM_BASE diff --git a/src/cpu/intel/socket_BGA956/Kconfig b/src/cpu/intel/socket_BGA956/Kconfig index 464a9b4679..84bb06dabc 100644 --- a/src/cpu/intel/socket_BGA956/Kconfig +++ b/src/cpu/intel/socket_BGA956/Kconfig @@ -6,7 +6,6 @@ if CPU_INTEL_SOCKET_BGA956 config SOCKET_SPECIFIC_OPTIONS def_bool y select CPU_INTEL_MODEL_1067X - select MMX config DCACHE_RAM_BASE hex diff --git a/src/cpu/intel/socket_FCBGA559/Kconfig b/src/cpu/intel/socket_FCBGA559/Kconfig index ed661b6e9c..9f1fbbbdfc 100644 --- a/src/cpu/intel/socket_FCBGA559/Kconfig +++ b/src/cpu/intel/socket_FCBGA559/Kconfig @@ -8,7 +8,6 @@ if CPU_INTEL_SOCKET_FCBGA559 config SOCKET_SPECIFIC_OPTIONS def_bool y select CPU_INTEL_MODEL_106CX - select MMX select CPU_HAS_L2_ENABLE_MSR config DCACHE_RAM_BASE diff --git a/src/cpu/intel/socket_LGA775/Kconfig b/src/cpu/intel/socket_LGA775/Kconfig index 3c9f262e3f..897b0328fe 100644 --- a/src/cpu/intel/socket_LGA775/Kconfig +++ b/src/cpu/intel/socket_LGA775/Kconfig @@ -9,7 +9,6 @@ config SOCKET_SPECIFIC_OPTIONS select CPU_INTEL_MODEL_F3X select CPU_INTEL_MODEL_F4X select CPU_INTEL_MODEL_1067X - select MMX select SIPI_VECTOR_IN_ROM config DCACHE_RAM_SIZE diff --git a/src/cpu/intel/socket_m/Kconfig b/src/cpu/intel/socket_m/Kconfig index 4e74eb4fad..6285e823a5 100644 --- a/src/cpu/intel/socket_m/Kconfig +++ b/src/cpu/intel/socket_m/Kconfig @@ -7,7 +7,6 @@ config SOCKET_SPECIFIC_OPTIONS def_bool y select CPU_INTEL_MODEL_6EX select CPU_INTEL_MODEL_6FX - select MMX config DCACHE_RAM_BASE hex diff --git a/src/cpu/intel/socket_mPGA604/Kconfig b/src/cpu/intel/socket_mPGA604/Kconfig index 12c8e37ab6..dcf0e98957 100644 --- a/src/cpu/intel/socket_mPGA604/Kconfig +++ b/src/cpu/intel/socket_mPGA604/Kconfig @@ -6,7 +6,6 @@ if CPU_INTEL_SOCKET_MPGA604 config SOCKET_SPECIFIC_OPTIONS def_bool y select CPU_INTEL_MODEL_F2X - select MMX select UDELAY_TSC select TSC_MONOTONIC_TIMER select SIPI_VECTOR_IN_ROM diff --git a/src/cpu/intel/socket_p/Kconfig b/src/cpu/intel/socket_p/Kconfig index e90b42a7f7..12e078c69b 100644 --- a/src/cpu/intel/socket_p/Kconfig +++ b/src/cpu/intel/socket_p/Kconfig @@ -7,7 +7,6 @@ config SOCKET_SPECIFIC_OPTIONS def_bool y select CPU_INTEL_MODEL_1067X select CPU_INTEL_MODEL_6FX - select MMX config DCACHE_RAM_BASE hex