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soc/intel/braswell: Rework acpi/cpu.asl 

Use acpigen_write_processor_cnot to implement notifications to the CPU.

Change-Id: I93c11e89da34c5432c6ce0415998b47bad339763
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/29889
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Arthur Heymans 2018-11-28 12:20:43 +01:00 committed by Duncan Laurie
parent a783305072
commit 1a9efe3b28
2 changed files with 15 additions and 45 deletions
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7
src/soc/intel/braswell/acpi.c
View File

@ -448,6 +448,13 @@ void generate_cpu_entries(struct device *device)
acpigen_pop_len();
}
/* PPKG is usually used for thermal management
of the first and only package. */
acpigen_write_processor_package("PPKG", 0, pattrs->num_cpus);
/* Add a method to notify processor nodes */
acpigen_write_processor_cnot(pattrs->num_cpus);
}
unsigned long acpi_madt_irq_overrides(unsigned long current)

53
src/soc/intel/braswell/acpi/cpu.asl
View File

@ -14,60 +14,23 @@
* GNU General Public License for more details.
*/
/* These devices are created at runtime */
External (\_PR.CP00, DeviceObj)
External (\_PR.CP01, DeviceObj)
External (\_PR.CP02, DeviceObj)
External (\_PR.CP03, DeviceObj)
/* These come from the dynamically created CPU SSDT */
External (\_PR.CNOT, MethodObj)
/* Notify OS to re-read CPU tables, assuming ^2 CPU count */
/* Notify OS to re-read CPU tables */
Method (PNOT)
{
If (LGreaterEqual (\PCNT, 2)) {
Notify (\_PR.CP00, 0x81) /* _CST */
Notify (\_PR.CP01, 0x81) /* _CST */
}
If (LGreaterEqual (\PCNT, 4)) {
Notify (\_PR.CP02, 0x81) /* _CST */
Notify (\_PR.CP03, 0x81) /* _CST */
}
\_PR.CNOT (0x81)
}
/* Notify OS to re-read CPU _PPC limit, assuming ^2 CPU count */
/* Notify OS to re-read CPU _PPC limit */
Method (PPCN)
{
If (LGreaterEqual (\PCNT, 2)) {
Notify (\_PR.CP00, 0x80) /* _PPC */
Notify (\_PR.CP01, 0x80) /* _PPC */
}
If (LGreaterEqual (\PCNT, 4)) {
Notify (\_PR.CP02, 0x80) /* _PPC */
Notify (\_PR.CP03, 0x80) /* _PPC */
}
\_PR.CNOT (0x80)
}
/* Notify OS to re-read Throttle Limit tables, assuming ^2 CPU count */
/* Notify OS to re-read Throttle Limit tables */
Method (TNOT)
{
If (LGreaterEqual (\PCNT, 2)) {
Notify (\_PR.CP00, 0x82) /* _TPC */
Notify (\_PR.CP01, 0x82) /* _TPC */
}
If (LGreaterEqual (\PCNT, 4)) {
Notify (\_PR.CP02, 0x82) /* _TPC */
Notify (\_PR.CP03, 0x82) /* _TPC */
}
}
/* Return a package containing enabled processor entries */
Method (PPKG)
{
If (LGreaterEqual (\PCNT, 4)) {
Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03})
} ElseIf (LGreaterEqual (\PCNT, 2)) {
Return (Package() {\_PR.CP00, \_PR.CP01})
} Else {
Return (Package() {\_PR.CP00})
}
\_PR.CNOT (0x82)
}