Coding-style fixes for flashrom, partly indent-aided (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3669 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Uwe Hermann 2008-10-18 21:14:13 +00:00
parent 582364d808
commit 1aa329dcb0
13 changed files with 283 additions and 232 deletions

View File

@ -699,13 +699,15 @@ void print_supported_boards(void)
* Match boards on coreboot table gathered vendor and part name.
* Require main PCI IDs to match too as extra safety.
*/
static struct board_pciid_enable *board_match_coreboot_name(const char *vendor, const char *part)
static struct board_pciid_enable *board_match_coreboot_name(const char *vendor,
const char *part)
{
struct board_pciid_enable *board = board_pciid_enables;
struct board_pciid_enable *partmatch = NULL;
for (; board->name; board++) {
if (vendor && (!board->lb_vendor || strcasecmp(board->lb_vendor, vendor)))
if (vendor && (!board->lb_vendor
|| strcasecmp(board->lb_vendor, vendor)))
continue;
if (!board->lb_part || strcasecmp(board->lb_part, part))

View File

@ -45,7 +45,6 @@
flashbus_t flashbus = BUS_TYPE_LPC;
void *spibar = NULL;
static int enable_flash_ali_m1533(struct pci_dev *dev, const char *name)
{
uint8_t tmp;
@ -201,7 +200,8 @@ static int enable_flash_ich_dc(struct pci_dev *dev, const char *name)
#define ICH_STRAP_PCI 0x02
#define ICH_STRAP_LPC 0x03
static int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name) {
static int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name)
{
uint32_t mmio_base;
mmio_base = (pci_read_long(dev, 0xbc)) << 8;
@ -214,14 +214,16 @@ static int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name) {
exit(1);
}
printf_debug("0x6c: 0x%04x (CLOCK/DEBUG)\n", *(uint16_t *)(spibar + 0x6c));
printf_debug("0x6c: 0x%04x (CLOCK/DEBUG)\n",
*(uint16_t *) (spibar + 0x6c));
flashbus = BUS_TYPE_VIA_SPI;
return 0;
}
static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, int ich_generation)
static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name,
int ich_generation)
{
int ret, i;
uint8_t old, new, bbs, buc;
@ -238,7 +240,8 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, int ic
printf_debug("\nRoot Complex Register Block address = 0x%x\n", tmp);
/* Map RCBA to virtual memory */
rcrb = mmap(0, 0x4000, PROT_READ | PROT_WRITE, MAP_SHARED, fd_mem, (off_t)tmp);
rcrb = mmap(0, 0x4000, PROT_READ | PROT_WRITE, MAP_SHARED, fd_mem,
(off_t) tmp);
if (rcrb == MAP_FAILED) {
perror("Can't mmap memory using " MEM_DEV);
exit(1);
@ -252,7 +255,8 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, int ic
printf_debug("BOOT BIOS Straps: 0x%x (%s)\n", bbs, straps_names[bbs]);
buc = *(volatile uint8_t *)(rcrb + 0x3414);
printf_debug("Top Swap : %s\n", (buc & 1)?"enabled (A16 inverted)":"not enabled");
printf_debug("Top Swap : %s\n",
(buc & 1) ? "enabled (A16 inverted)" : "not enabled");
/* It seems the ICH7 does not support SPI and LPC chips at the same
* time. At least not with our current code. So we prevent searching
@ -289,24 +293,35 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, int ic
switch (flashbus) {
case BUS_TYPE_ICH7_SPI:
printf_debug("0x00: 0x%04x (SPIS)\n", *(uint16_t *)(spibar + 0));
printf_debug("0x02: 0x%04x (SPIC)\n", *(uint16_t *)(spibar + 2));
printf_debug("0x04: 0x%08x (SPIA)\n", *(uint32_t *)(spibar + 4));
printf_debug("0x00: 0x%04x (SPIS)\n",
*(uint16_t *) (spibar + 0));
printf_debug("0x02: 0x%04x (SPIC)\n",
*(uint16_t *) (spibar + 2));
printf_debug("0x04: 0x%08x (SPIA)\n",
*(uint32_t *) (spibar + 4));
for (i = 0; i < 8; i++) {
int offs;
offs = 8 + (i * 8);
printf_debug("0x%02x: 0x%08x (SPID%d)\n", offs, *(uint32_t *)(spibar + offs), i);
printf_debug("0x%02x: 0x%08x (SPID%d+4)\n", offs+4, *(uint32_t *)(spibar + offs +4), i);
printf_debug("0x%02x: 0x%08x (SPID%d)\n", offs,
*(uint32_t *) (spibar + offs), i);
printf_debug("0x%02x: 0x%08x (SPID%d+4)\n", offs + 4,
*(uint32_t *) (spibar + offs + 4), i);
}
printf_debug("0x50: 0x%08x (BBAR)\n", *(uint32_t *)(spibar + 0x50));
printf_debug("0x54: 0x%04x (PREOP)\n", *(uint16_t *)(spibar + 0x54));
printf_debug("0x56: 0x%04x (OPTYPE)\n", *(uint16_t *)(spibar + 0x56));
printf_debug("0x58: 0x%08x (OPMENU)\n", *(uint32_t *)(spibar + 0x58));
printf_debug("0x5c: 0x%08x (OPMENU+4)\n", *(uint32_t *)(spibar + 0x5c));
printf_debug("0x50: 0x%08x (BBAR)\n",
*(uint32_t *) (spibar + 0x50));
printf_debug("0x54: 0x%04x (PREOP)\n",
*(uint16_t *) (spibar + 0x54));
printf_debug("0x56: 0x%04x (OPTYPE)\n",
*(uint16_t *) (spibar + 0x56));
printf_debug("0x58: 0x%08x (OPMENU)\n",
*(uint32_t *) (spibar + 0x58));
printf_debug("0x5c: 0x%08x (OPMENU+4)\n",
*(uint32_t *) (spibar + 0x5c));
for (i = 0; i < 4; i++) {
int offs;
offs = 0x60 + (i * 4);
printf_debug("0x%02x: 0x%08x (PBR%d)\n", offs, *(uint32_t *)(spibar + offs), i);
printf_debug("0x%02x: 0x%08x (PBR%d)\n", offs,
*(uint32_t *) (spibar + offs), i);
}
printf_debug("\n");
if ((*(uint16_t *) spibar) & (1 << 15)) {
@ -460,7 +475,8 @@ static int enable_flash_cs5536(struct pci_dev *dev, const char *name)
if (buf[7] != 0x22) {
buf[7] &= 0xfb;
if (lseek64(fd_msr, (off64_t) MSR_RCONF_DEFAULT, SEEK_SET) == -1) {
if (lseek64(fd_msr, (off64_t) MSR_RCONF_DEFAULT,
SEEK_SET) == -1) {
perror("lseek64");
close(fd_msr);
return -1;
@ -642,10 +658,9 @@ static int enable_flash_sb400(struct pci_dev *dev, const char *name)
f.device = 0x4372;
for (smbusdev = pacc->devices; smbusdev; smbusdev = smbusdev->next) {
if (pci_filter_match(&f, smbusdev)) {
if (pci_filter_match(&f, smbusdev))
break;
}
}
if (!smbusdev) {
fprintf(stderr, "ERROR: SMBus device not found. Aborting.\n");
@ -697,9 +712,7 @@ static int enable_flash_mcp55(struct pci_dev *dev, const char *name)
pci_write_byte(dev, 0x6d, new);
if (pci_read_byte(dev, 0x6d) != new) {
printf
("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n",
0x6d, new, name);
printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x6d, new, name);
return -1;
}

View File

@ -54,7 +54,8 @@
struct flashchip {
const char *vendor;
const char *name;
/* With 32bit manufacture_id and model_id we can cover IDs up to
/*
* With 32bit manufacture_id and model_id we can cover IDs up to
* (including) the 4th bank of JEDEC JEP106W Standard Manufacturer's
* Identification code.
*/
@ -64,7 +65,8 @@ struct flashchip {
int total_size;
int page_size;
/* Indicate if flashrom has been tested with this flash chip and if
/*
* Indicate if flashrom has been tested with this flash chip and if
* everything worked correctly.
*/
uint32_t tested;
@ -179,7 +181,8 @@ extern struct flashchip flashchips[];
#define EN_29F002B 0x7F97
#define FUJITSU_ID 0x04 /* Fujitsu */
/* MBM29F400TC_STRANGE has a value not mentioned in the data sheet and we
/*
* MBM29F400TC_STRANGE has a value not mentioned in the data sheet and we
* try to read it from a location not mentioned in the data sheet.
*/
#define MBM29F400TC_STRANGE 0x23
@ -215,8 +218,9 @@ extern struct flashchip flashchips[];
#define MX_25L3235D 0x2416
#define MX_29F002 0xB0
/* Programmable Micro Corp is listed in JEP106W in bank 2, so it should have
* a 0x7F continuation code prefix.
/*
* Programmable Micro Corp is listed in JEP106W in bank 2, so it should
* have a 0x7F continuation code prefix.
*/
#define PMC_ID 0x7F9D /* PMC */
#define PMC_ID_NOPREFIX 0x9D /* PMC, missing 0x7F prefix */
@ -366,7 +370,6 @@ struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
uint16_t card_vendor, uint16_t card_device);
/* board_enable.c */
int board_flash_enable(const char *vendor, const char *part);
void print_supported_boards(void);
@ -416,7 +419,8 @@ extern char *lb_part, *lb_vendor;
int probe_spi_rdid(struct flashchip *flash);
int probe_spi_rdid4(struct flashchip *flash);
int probe_spi_res(struct flashchip *flash);
int spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
int spi_command(unsigned int writecnt, unsigned int readcnt,
const unsigned char *writearr, unsigned char *readarr);
void spi_write_enable();
void spi_write_disable();
int spi_chip_erase_c7(struct flashchip *flash);
@ -443,14 +447,16 @@ int erase_en29f002a(struct flashchip *flash);
int write_en29f002a(struct flashchip *flash, uint8_t *buf);
/* ichspi.c */
int ich_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
int ich_spi_command(unsigned int writecnt, unsigned int readcnt,
const unsigned char *writearr, unsigned char *readarr);
int ich_spi_read(struct flashchip *flash, uint8_t * buf);
int ich_spi_write(struct flashchip *flash, uint8_t * buf);
/* it87spi.c */
extern uint16_t it8716f_flashport;
int it87xx_probe_spi_flash(const char *name);
int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt,
const unsigned char *writearr, unsigned char *readarr);
int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf);
int it8716f_spi_chip_write(struct flashchip *flash, uint8_t *buf);

View File

@ -74,8 +74,10 @@ struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
for (temp = pacc->devices; temp; temp = temp->next)
if (pci_filter_match(&filter, temp)) {
if ((card_vendor == pci_read_word(temp, PCI_SUBSYSTEM_VENDOR_ID)) &&
(card_device == pci_read_word(temp, PCI_SUBSYSTEM_ID)))
if ((card_vendor ==
pci_read_word(temp, PCI_SUBSYSTEM_VENDOR_ID))
&& (card_device ==
pci_read_word(temp, PCI_SUBSYSTEM_ID)))
return temp;
}
@ -131,7 +133,6 @@ struct flashchip *probe_flash(struct flashchip *first_flash, int force)
*/
size = getpagesize();
}
#ifdef TS5300
// FIXME: Wrong place for this decision
// FIXME: This should be autodetected. It is trivial.
@ -154,7 +155,8 @@ struct flashchip *probe_flash(struct flashchip *first_flash, int force)
if (flash->probe(flash) != 1)
goto notfound;
if (first_flash == flashchips || flash->model_id != GENERIC_DEVICE_ID)
if (first_flash == flashchips
|| flash->model_id != GENERIC_DEVICE_ID)
break;
notfound:
@ -220,7 +222,8 @@ void print_supported_chips(void)
void usage(const char *name)
{
printf("usage: %s [-rwvEVfLhR] [-c chipname] [-s exclude_start]\n", name);
printf("usage: %s [-rwvEVfLhR] [-c chipname] [-s exclude_start]\n",
name);
printf(" [-e exclude_end] [-m [vendor:]part] [-l file.layout] [-i imagename] [file]\n");
printf
(" -r | --read: read flash and save into file\n"
@ -383,8 +386,7 @@ int main(int argc, char *argv[])
#else
if (iopl(3) != 0) {
#endif
fprintf(stderr, "ERROR: Could not get IO privileges (%s).\nYou need to be root.\n",
strerror(errno));
fprintf(stderr, "ERROR: Could not get IO privileges (%s).\nYou need to be root.\n", strerror(errno));
exit(1);
}
@ -420,7 +422,8 @@ int main(int argc, char *argv[])
board_flash_enable(lb_vendor, lb_part);
for (i = 0; i < ARRAY_SIZE(flashes); i++) {
flashes[i] = probe_flash(i ? flashes[i - 1] + 1 : flashchips, 0);
flashes[i] =
probe_flash(i ? flashes[i - 1] + 1 : flashchips, 0);
if (!flashes[i])
for (i++; i < ARRAY_SIZE(flashes); i++)
flashes[i] = NULL;
@ -468,7 +471,8 @@ int main(int argc, char *argv[])
if (exclude_end_position - exclude_start_position > 0)
memset(buf + exclude_start_position, 0,
exclude_end_position - exclude_start_position);
exclude_end_position -
exclude_start_position);
fwrite(buf, sizeof(char), size, image);
fclose(image);

View File

@ -328,7 +328,6 @@ static int ich7_run_opcode(uint8_t nr, OPCODE op, uint32_t offset,
return 0;
}
static int ich9_run_opcode(uint8_t nr, OPCODE op, uint32_t offset,
uint8_t datalength, uint8_t * data)
{
@ -452,8 +451,7 @@ static int run_opcode(uint8_t nr, OPCODE op, uint32_t offset,
static int ich_spi_erase_block(struct flashchip *flash, int offset)
{
printf_debug("ich_spi_erase_block: offset=%d, sectors=%d\n",
offset, 1);
printf_debug("ich_spi_erase_block: offset=%d, sectors=%d\n", offset, 1);
if (run_opcode(2, curopcodes->opcode[2], offset, 0, NULL) != 0) {
printf_debug("Error erasing sector at 0x%x", offset);
@ -465,7 +463,8 @@ static int ich_spi_erase_block(struct flashchip *flash, int offset)
return 0;
}
static int ich_spi_read_page(struct flashchip *flash, uint8_t * buf, int offset, int maxdata)
static int ich_spi_read_page(struct flashchip *flash, uint8_t * buf, int offset,
int maxdata)
{
int page_size = flash->page_size;
uint32_t remaining = flash->page_size;
@ -577,7 +576,8 @@ int ich_spi_write(struct flashchip *flash, uint8_t * buf)
maxdata = 16;
for (j = 0; j < erase_size / page_size; j++) {
ich_spi_write_page(flash, (void *)(buf + (i * erase_size) + (j * page_size)),
ich_spi_write_page(flash,
(void *)(buf + (i * erase_size) + (j * page_size)),
(i * erase_size) + (j * page_size), maxdata);
}
}

View File

@ -33,7 +33,6 @@
#define ITE_SUPERIO_PORT1 0x2e
#define ITE_SUPERIO_PORT2 0x4e
uint16_t it8716f_flashport = 0;
/* use fast 33MHz SPI (<>0) or slow 16MHz (0) */
int fast_spi = 1;
@ -123,13 +122,17 @@ int it87xx_probe_spi_flash(const char *name)
return (!it8716f_flashport);
}
/* The IT8716F only supports commands with length 1,2,4,5 bytes including
command byte and can not read more than 3 bytes from the device.
This function expects writearr[0] to be the first byte sent to the device,
whereas the IT8716F splits commands internally into address and non-address
commands with the address in inverse wire order. That's why the register
ordering in case 4 and 5 may seem strange. */
int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr)
/*
* The IT8716F only supports commands with length 1,2,4,5 bytes including
* command byte and can not read more than 3 bytes from the device.
*
* This function expects writearr[0] to be the first byte sent to the device,
* whereas the IT8716F splits commands internally into address and non-address
* commands with the address in inverse wire order. That's why the register
* ordering in case 4 and 5 may seem strange.
*/
int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt,
const unsigned char *writearr, unsigned char *readarr)
{
uint8_t busy, writeenc;
int i;
@ -172,27 +175,29 @@ int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt, const unsig
__FUNCTION__, writecnt);
return 1;
}
/* Start IO, 33 or 16 MHz, readcnt input bytes, writecnt output bytes.
/*
* Start IO, 33 or 16 MHz, readcnt input bytes, writecnt output bytes.
* Note:
* We can't use writecnt directly, but have to use a strange encoding.
*/
OUTB(((0x4 + (fast_spi ? 1 : 0)) << 4) | ((readcnt & 0x3) << 2) | (writeenc), it8716f_flashport);
OUTB(((0x4 + (fast_spi ? 1 : 0)) << 4)
| ((readcnt & 0x3) << 2) | (writeenc), it8716f_flashport);
if (readcnt > 0) {
do {
busy = INB(it8716f_flashport) & 0x80;
} while (busy);
for (i = 0; i < readcnt; i++) {
for (i = 0; i < readcnt; i++)
readarr[i] = INB(it8716f_flashport + 5 + i);
}
}
return 0;
}
/* Page size is usually 256 bytes */
static void it8716f_spi_page_program(int block, uint8_t *buf, uint8_t *bios) {
static void it8716f_spi_page_program(int block, uint8_t *buf, uint8_t *bios)
{
int i;
spi_write_enable();
@ -217,6 +222,7 @@ int it8716f_over512k_spi_chip_write(struct flashchip *flash, uint8_t *buf)
{
int total_size = 1024 * flash->total_size;
int i;
fast_spi = 0;
spi_disable_blockprotect();
@ -228,6 +234,7 @@ int it8716f_over512k_spi_chip_write(struct flashchip *flash, uint8_t *buf)
}
/* resume normal ops... */
OUTB(0x20, it8716f_flashport);
return 0;
}
@ -251,19 +258,23 @@ int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf)
} else {
memcpy(buf, (const char *)flash->virtual_memory, total_size);
}
return 0;
}
int it8716f_spi_chip_write(struct flashchip *flash, uint8_t *buf) {
int it8716f_spi_chip_write(struct flashchip *flash, uint8_t *buf)
{
int total_size = 1024 * flash->total_size;
int i;
if (total_size > 512 * 1024) {
it8716f_over512k_spi_chip_write(flash, buf);
} else {
for (i = 0; i < total_size / 256; i++) {
it8716f_spi_page_program(i, buf, (uint8_t *)flash->virtual_memory);
it8716f_spi_page_program(i, buf,
(uint8_t *)flash->virtual_memory);
}
}
return 0;
}
return 0;
}

View File

@ -31,7 +31,6 @@ void write_lockbits_49fl00x(volatile uint8_t *bios, int size,
int i, left = size;
for (i = 0; left >= block_size; i++, left -= block_size) {
/* pm49fl002 */
if (block_size == 16384 && i % 2)
continue;
@ -58,9 +57,13 @@ int erase_49fl00x(struct flashchip *flash)
volatile uint8_t *bios = flash->virtual_memory;
/* unprotected */
write_lockbits_49fl00x(flash->virtual_registers, total_size, 0, page_size);
write_lockbits_49fl00x(flash->virtual_registers,
total_size, 0, page_size);
//erase_chip_jedec will not work ... datasheet says "Chip erase is available in A/A Mux Mode only"
/*
* erase_chip_jedec() will not work... Datasheet says
* "Chip erase is available in A/A Mux Mode only".
*/
printf("Erasing page: ");
for (i = 0; i < total_size / page_size; i++) {
if ((i >= exclude_start_page) && (i < exclude_end_page))
@ -75,7 +78,8 @@ int erase_49fl00x(struct flashchip *flash)
printf("\n");
/* protected */
write_lockbits_49fl00x(flash->virtual_registers, total_size, 1, page_size);
write_lockbits_49fl00x(flash->virtual_registers,
total_size, 1, page_size);
return 0;
}
@ -88,7 +92,8 @@ int write_49fl00x(struct flashchip *flash, uint8_t *buf)
volatile uint8_t *bios = flash->virtual_memory;
/* unprotected */
write_lockbits_49fl00x(flash->virtual_registers, total_size, 0, page_size);
write_lockbits_49fl00x(flash->virtual_registers, total_size, 0,
page_size);
printf("Programming page: ");
for (i = 0; i < total_size / page_size; i++) {
@ -108,7 +113,8 @@ int write_49fl00x(struct flashchip *flash, uint8_t *buf)
printf("\n");
/* protected */
write_lockbits_49fl00x(flash->virtual_registers, total_size, 1, page_size);
write_lockbits_49fl00x(flash->virtual_registers, total_size, 1,
page_size);
return 0;
}

View File

@ -29,20 +29,23 @@
#include "flash.h"
#include "spi.h"
void spi_prettyprint_status_register(struct flashchip *flash);
int spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr)
int spi_command(unsigned int writecnt, unsigned int readcnt,
const unsigned char *writearr, unsigned char *readarr)
{
switch (flashbus) {
case BUS_TYPE_IT87XX_SPI:
return it8716f_spi_command(writecnt, readcnt, writearr, readarr);
return it8716f_spi_command(writecnt, readcnt, writearr,
readarr);
case BUS_TYPE_ICH7_SPI:
case BUS_TYPE_ICH9_SPI:
case BUS_TYPE_VIA_SPI:
return ich_spi_command(writecnt, readcnt, writearr, readarr);
default:
printf_debug("%s called, but no SPI chipset/strapping detected\n", __FUNCTION__);
printf_debug
("%s called, but no SPI chipset/strapping detected\n",
__FUNCTION__);
}
return 1;
}
@ -53,7 +56,8 @@ static int spi_rdid(unsigned char *readarr, int bytes)
if (spi_command(sizeof(cmd), bytes, cmd, readarr))
return 1;
printf_debug("RDID returned %02x %02x %02x.\n", readarr[0], readarr[1], readarr[2]);
printf_debug("RDID returned %02x %02x %02x.\n", readarr[0], readarr[1],
readarr[2]);
return 0;
}
@ -110,10 +114,10 @@ static int probe_spi_rdid_generic(struct flashchip *flash, int bytes)
model_id = (readarr[1] << 8) | readarr[2];
}
printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, manuf_id, model_id);
printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, manuf_id,
model_id);
if (manuf_id == flash->manufacture_id &&
model_id == flash->model_id) {
if (manuf_id == flash->manufacture_id && model_id == flash->model_id) {
/* Print the status register to tell the
* user about possible write protection.
*/
@ -130,13 +134,14 @@ static int probe_spi_rdid_generic(struct flashchip *flash, int bytes)
return 0;
}
int probe_spi_rdid(struct flashchip *flash) {
int probe_spi_rdid(struct flashchip *flash)
{
return probe_spi_rdid_generic(flash, 3);
}
/* support 4 bytes flash ID */
int probe_spi_rdid4(struct flashchip *flash) {
int probe_spi_rdid4(struct flashchip *flash)
{
/* only some SPI chipsets support 4 bytes commands */
switch (flashbus) {
case BUS_TYPE_ICH7_SPI:
@ -330,7 +335,8 @@ int spi_sector_erase(const struct flashchip *flash, unsigned long addr)
*/
void spi_write_status_register(int status)
{
const unsigned char cmd[JEDEC_WRSR_OUTSIZE] = {JEDEC_WRSR, (unsigned char)status};
const unsigned char cmd[JEDEC_WRSR_OUTSIZE] =
{ JEDEC_WRSR, (unsigned char)status };
/* Send WRSR (Write Status Register) */
spi_command(sizeof(cmd), 0, cmd, NULL);
@ -338,7 +344,8 @@ void spi_write_status_register(int status)
void spi_byte_program(int address, uint8_t byte)
{
const unsigned char cmd[JEDEC_BYTE_PROGRAM_OUTSIZE] = {JEDEC_BYTE_PROGRAM,
const unsigned char cmd[JEDEC_BYTE_PROGRAM_OUTSIZE] = {
JEDEC_BYTE_PROGRAM,
(address >> 16) & 0xff,
(address >> 8) & 0xff,
(address >> 0) & 0xff,
@ -364,7 +371,8 @@ void spi_disable_blockprotect(void)
void spi_nbyte_read(int address, uint8_t *bytes, int len)
{
const unsigned char cmd[JEDEC_READ_OUTSIZE] = {JEDEC_READ,
const unsigned char cmd[JEDEC_READ_OUTSIZE] = {
JEDEC_READ,
(address >> 16) & 0xff,
(address >> 8) & 0xff,
(address >> 0) & 0xff,
@ -376,7 +384,6 @@ void spi_nbyte_read(int address, uint8_t *bytes, int len)
int spi_chip_read(struct flashchip *flash, uint8_t *buf)
{
switch (flashbus) {
case BUS_TYPE_IT87XX_SPI:
return it8716f_spi_chip_read(flash, buf);
@ -385,7 +392,9 @@ int spi_chip_read(struct flashchip *flash, uint8_t *buf)
case BUS_TYPE_VIA_SPI:
return ich_spi_read(flash, buf);
default:
printf_debug("%s called, but no SPI chipset/strapping detected\n", __FUNCTION__);
printf_debug
("%s called, but no SPI chipset/strapping detected\n",
__FUNCTION__);
}
return 1;
@ -401,9 +410,10 @@ int spi_chip_write(struct flashchip *flash, uint8_t *buf)
case BUS_TYPE_VIA_SPI:
return ich_spi_write(flash, buf);
default:
printf_debug("%s called, but no SPI chipset/strapping detected\n", __FUNCTION__);
printf_debug
("%s called, but no SPI chipset/strapping detected\n",
__FUNCTION__);
}
return 1;
}

View File

@ -16,7 +16,6 @@
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
*/
/*
@ -25,7 +24,6 @@
* ST M50FLW040B (not yet tested)
* ST M50FLW080A
* ST M50FLW080B (not yet tested)
*
*/
#include <stdio.h>
@ -93,7 +91,6 @@ int probe_stm50flw0x0x(struct flashchip *flash)
return 1;
}
static void wait_stm50flw0x0x(volatile uint8_t *bios)
{
uint8_t id1;
@ -114,13 +111,12 @@ static void wait_stm50flw0x0x(volatile uint8_t *bios)
*(volatile uint8_t *)(bios + 0x5555) = 0xAA;
*(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
*(volatile uint8_t *)(bios + 0x5555) = 0xF0;
}
/*
* claus.gindhart@kontron.com
* The ST M50FLW080B and STM50FLW080B chips have to be unlocked,
* before you can erase them or write to them
* before you can erase them or write to them.
*/
int unlock_block_stm50flw0x0x(struct flashchip *flash, int offset)
{
@ -128,16 +124,16 @@ int unlock_block_stm50flw0x0x(struct flashchip *flash, int offset)
const uint8_t unlock_sector = 0x00;
int j;
/* These chips have to be unlocked before you can erase
* them or write to them
* The size of the locking sectors depends on the type
* of chip
/*
* These chips have to be unlocked before you can erase them or write
* to them. The size of the locking sectors depends on the type
* of chip.
*
* Sometimes, the BIOS does this for you; so you propably
* dont need to worry about that
* don't need to worry about that.
*/
/* check, if it's is a top/bottom-block with 4k-sectors */
/* Check, if it's is a top/bottom-block with 4k-sectors. */
/* TODO: What about the other types? */
if ((offset == 0) ||
(offset == (flash->model_id == ST_M50FLW080A ? 0xE0000 : 0x10000))
@ -147,17 +143,16 @@ int unlock_block_stm50flw0x0x(struct flashchip *flash, int offset)
for (j = 0; j < 0x10000; j += 0x1000) {
printf_debug("unlocking at 0x%x\n", offset + j);
*(flash_addr + offset + j) = unlock_sector;
if (*(flash_addr + offset + j) != unlock_sector)
{
printf("Cannot unlock sector @ 0x%x\n",offset + j);
if (*(flash_addr + offset + j) != unlock_sector) {
printf("Cannot unlock sector @ 0x%x\n",
offset + j);
return -1;
}
}
} else {
printf_debug("unlocking at 0x%x\n", offset);
*(flash_addr + offset) = unlock_sector;
if (*(flash_addr + offset) != unlock_sector)
{
if (*(flash_addr + offset) != unlock_sector) {
printf("Cannot unlock sector @ 0x%x\n", offset);
return -1;
}
@ -247,7 +242,8 @@ int erase_stm50flw0x0x(struct flashchip *flash)
("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
printf("%04d at address: 0x%08x ", i, i * page_size);
rc = unlock_block_stm50flw0x0x(flash, i * page_size);
if (!rc) rc = erase_block_stm50flw0x0x(flash, i * page_size);
if (!rc)
rc = erase_block_stm50flw0x0x(flash, i * page_size);
}
printf("\n");
protect_stm50flw0x0x(bios);
@ -282,8 +278,10 @@ int write_stm50flw0x0x(struct flashchip *flash, uint8_t * buf)
}
rc = unlock_block_stm50flw0x0x(flash, i * page_size);
if (!rc) rc = erase_block_stm50flw0x0x(flash, i * page_size);
if (!rc) write_page_stm50flw0x0x(bios, buf + i * page_size,
if (!rc)
rc = erase_block_stm50flw0x0x(flash, i * page_size);
if (!rc)
write_page_stm50flw0x0x(bios, buf + i * page_size,
bios + i * page_size, page_size);
}
printf("\n");

View File

@ -57,7 +57,8 @@ static int unlock_block_winbond_fwhub(struct flashchip *flash, int offset)
volatile uint8_t *wrprotect = flash->virtual_registers + offset + 2;
uint8_t locking;
printf_debug("Trying to unlock block @0x%08x = 0x%02x\n", offset, *wrprotect);
printf_debug("Trying to unlock block @0x%08x = 0x%02x\n", offset,
*wrprotect);
locking = *wrprotect;
switch (locking & 0x7) {
@ -142,7 +143,8 @@ int unlock_winbond_fwhub(struct flashchip *flash)
return 0;
}
static int erase_sector_winbond_fwhub(volatile uint8_t *bios, unsigned int sector)
static int erase_sector_winbond_fwhub(volatile uint8_t *bios,
unsigned int sector)
{
/* Remember: too much sleep can waste your day. */
@ -205,4 +207,3 @@ int write_winbond_fwhub(struct flashchip *flash, uint8_t *buf)
return 0;
}