Intel: Add common header file for CAR setup

When passing '-ffreestanding' the 'main' romstage.c may no longer
necessarily be considered the entry point.

From the C specification in 5.1.2.1 Freestanding environment;

"In a freestanding environment (in which C program execution may take
place without any benefit of an operating system), the name and type of
the function called at program startup are implementation-defined."

Clang complains about these being missing as Clang is somewhat more
strict about the spec than GNU/GCC is. An advantage here is that a
different entry-point type-signature shall now be warned about at
compile time.

Change-Id: I467001adabd47958c30c9a15e3248e42ed1151f3
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5872
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Edward O'Callaghan 2014-05-26 17:38:23 +10:00
parent 67584f210a
commit 1ab2027955
113 changed files with 119 additions and 2 deletions

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@ -0,0 +1,7 @@
#ifndef _CPU_INTEL_CAR_H
#define _CPU_INTEL_CAR_H
/* std signature of entry-point to romstage.c */
void main(unsigned long bist);
#endif /* _CPU_INTEL_CAR_H */

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@ -42,6 +42,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

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@ -41,6 +41,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

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@ -54,6 +54,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
#include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/syspreinit.c"
#include "cpu/amd/geode_lx/msrinit.c" #include "cpu/amd/geode_lx/msrinit.c"
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
static const struct mem_controller memctrl[] = { static const struct mem_controller memctrl[] = {

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@ -43,6 +43,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

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@ -30,6 +30,7 @@
#define SERIAL_DEV PNP_DEV(0x3f0, W83977F_SP1) #define SERIAL_DEV PNP_DEV(0x3f0, W83977F_SP1)
#include <cpu/intel/car.h>
static void main(unsigned long bist) static void main(unsigned long bist)
{ {
w83977f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); w83977f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

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@ -49,6 +49,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
#include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/syspreinit.c"
#include "cpu/amd/geode_lx/msrinit.c" #include "cpu/amd/geode_lx/msrinit.c"
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {

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@ -45,6 +45,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
#include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/syspreinit.c"
#include "cpu/amd/geode_lx/msrinit.c" #include "cpu/amd/geode_lx/msrinit.c"
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {

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@ -31,6 +31,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "cpu/amd/geode_gx2/syspreinit.c" #include "cpu/amd/geode_gx2/syspreinit.c"
#include "cpu/amd/geode_lx/msrinit.c" #include "cpu/amd/geode_lx/msrinit.c"
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
static const struct mem_controller memctrl [] = { static const struct mem_controller memctrl [] = {

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@ -39,6 +39,7 @@ int spd_read_byte(unsigned device, unsigned address)
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
static const struct mem_controller memctrl[] = { static const struct mem_controller memctrl[] = {

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@ -57,6 +57,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
#include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/syspreinit.c"
#include "cpu/amd/geode_lx/msrinit.c" #include "cpu/amd/geode_lx/msrinit.c"
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {

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@ -30,6 +30,7 @@
#define SERIAL_DEV PNP_DEV(0x2e, PC87351_SP1) #define SERIAL_DEV PNP_DEV(0x2e, PC87351_SP1)
#include <cpu/intel/car.h>
static void main(unsigned long bist) static void main(unsigned long bist)
{ {
pc87351_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); pc87351_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

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@ -31,6 +31,7 @@
#define SERIAL_DEV PNP_DEV(0x2e, PC87351_SP1) #define SERIAL_DEV PNP_DEV(0x2e, PC87351_SP1)
#include <cpu/intel/car.h>
static void main(unsigned long bist) static void main(unsigned long bist)
{ {
pc87351_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); pc87351_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

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@ -110,6 +110,7 @@ int mainboard_set_fbd_clock(int speed)
} }
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
if (bist == 0) if (bist == 0)

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@ -34,6 +34,7 @@
#define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1) #define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1)
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

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@ -34,6 +34,7 @@
#define SERIAL_DEV PNP_DEV(0x2e, LPC47B272_SP1) #define SERIAL_DEV PNP_DEV(0x2e, LPC47B272_SP1)
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
lpc47b272_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); lpc47b272_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

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@ -41,6 +41,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

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@ -41,6 +41,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

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@ -43,6 +43,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

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@ -42,6 +42,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

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@ -42,6 +42,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

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@ -74,6 +74,7 @@ static void disable_spd(void)
outb(0x67, PM_IO_BASE + 0x37); outb(0x67, PM_IO_BASE + 0x37);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

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@ -31,6 +31,7 @@
#define SERIAL_DEV PNP_DEV(0x2e, PC97317_SP1) #define SERIAL_DEV PNP_DEV(0x2e, PC97317_SP1)
#include <cpu/intel/car.h>
static void main(unsigned long bist) static void main(unsigned long bist)
{ {
pc97317_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); pc97317_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

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@ -43,6 +43,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

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@ -46,6 +46,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
#include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/syspreinit.c"
#include "cpu/amd/geode_lx/msrinit.c" #include "cpu/amd/geode_lx/msrinit.c"
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
static const struct mem_controller memctrl[] = { static const struct mem_controller memctrl[] = {

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@ -31,6 +31,7 @@
#define SERIAL_DEV PNP_DEV(0x2e, PC97317_SP1) #define SERIAL_DEV PNP_DEV(0x2e, PC97317_SP1)
#include <cpu/intel/car.h>
static void main(unsigned long bist) static void main(unsigned long bist)
{ {
pc97317_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); pc97317_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

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@ -81,6 +81,7 @@ static const struct mem_controller ctrl = {
.channel0 = { DIMM0 }, .channel0 = { DIMM0 },
}; };
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
/* Enable multifunction for northbridge. */ /* Enable multifunction for northbridge. */

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@ -40,6 +40,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

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@ -42,6 +42,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
/* FIXME: Should be PC97307! */ /* FIXME: Should be PC97307! */

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@ -26,6 +26,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/intel/i855/raminit.c" #include "northbridge/intel/i855/raminit.c"
#include "northbridge/intel/i855/reset_test.c" #include "northbridge/intel/i855/reset_test.c"
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
if (bist == 0) { if (bist == 0) {

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@ -154,6 +154,7 @@ static inline void irqinit(void){
#endif #endif
} }
#include <cpu/intel/car.h>
static void main(unsigned long bist) static void main(unsigned long bist)
{ {
volatile int i; volatile int i;

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@ -30,6 +30,7 @@ int spd_read_byte(unsigned device, unsigned address)
#include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/syspreinit.c"
#include "cpu/amd/geode_lx/msrinit.c" #include "cpu/amd/geode_lx/msrinit.c"
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {

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@ -300,6 +300,7 @@ static void enable_l2_cache(void)
pci_write_config8(NB1, 0xe8, reg_nb_f1_e8); pci_write_config8(NB1, 0xe8, reg_nb_f1_e8);
} }
#include <cpu/intel/car.h>
static void main(unsigned long bist) static void main(unsigned long bist)
{ {
device_t dev; device_t dev;

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@ -12,6 +12,7 @@
#define SERIAL_DEV PNP_DEV(0x2e, PC97317_SP1) #define SERIAL_DEV PNP_DEV(0x2e, PC97317_SP1)
#include <cpu/intel/car.h>
static void main(unsigned long bist) static void main(unsigned long bist)
{ {
pc97317_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); pc97317_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

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@ -37,6 +37,7 @@
#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1) #define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
#define CLKIN_DEV PNP_DEV(0x2e, IT8712F_GPIO) #define CLKIN_DEV PNP_DEV(0x2e, IT8712F_GPIO)
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
ite_conf_clkin(CLKIN_DEV, ITE_UART_CLK_PREDIVIDE_24); ite_conf_clkin(CLKIN_DEV, ITE_UART_CLK_PREDIVIDE_24);

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@ -33,7 +33,7 @@
#include "memory.c" #include "memory.c"
void main(unsigned long bist); #include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
int cbmem_was_initted; int cbmem_was_initted;

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@ -34,6 +34,7 @@
#include "../qemu-i440fx/memory.c" #include "../qemu-i440fx/memory.c"
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
int cbmem_was_initted; int cbmem_was_initted;

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@ -265,6 +265,7 @@ static void early_ich7_init(void)
RCBA32(0x2034) = reg32; RCBA32(0x2034) = reg32;
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
u32 reg32; u32 reg32;

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@ -40,6 +40,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
it8671f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); it8671f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

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@ -40,6 +40,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
it8671f_48mhz_clkin(); it8671f_48mhz_clkin();

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@ -112,6 +112,7 @@ static void rcba_config(void)
RCBA32(FD) = reg32; RCBA32(FD) = reg32;
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
int boot_mode = 0; int boot_mode = 0;

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@ -150,6 +150,7 @@ static void copy_spd(struct pei_data *peid)
sizeof(peid->spd_data[0])); sizeof(peid->spd_data[0]));
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
int boot_mode = 0; int boot_mode = 0;

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@ -113,6 +113,7 @@ static void rcba_config(void)
RCBA32(FD) = reg32; RCBA32(FD) = reg32;
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
int boot_mode = 0; int boot_mode = 0;

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@ -154,6 +154,7 @@ static void early_ec_init(void)
} }
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
int boot_mode = 0; int boot_mode = 0;

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@ -37,6 +37,7 @@
/* TODO: It's a PC87364 actually! */ /* TODO: It's a PC87364 actually! */
#define SERIAL_DEV PNP_DEV(0x2e, PC87360_SP1) #define SERIAL_DEV PNP_DEV(0x2e, PC87360_SP1)
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
/* TODO: It's a PC87364 actually! */ /* TODO: It's a PC87364 actually! */

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@ -223,6 +223,7 @@ static void early_ich7_init(void)
RCBA32(0x2034) = reg32; RCBA32(0x2034) = reg32;
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
u32 reg32; u32 reg32;

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@ -32,6 +32,7 @@
#define SERIAL_DEV PNP_DEV(0x3f0, W83977F_SP1) #define SERIAL_DEV PNP_DEV(0x3f0, W83977F_SP1)
#include <cpu/intel/car.h>
static void main(unsigned long bist) static void main(unsigned long bist)
{ {
w83977f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); w83977f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

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@ -32,6 +32,7 @@
#include "northbridge/amd/gx1/raminit.c" #include "northbridge/amd/gx1/raminit.c"
#include <cpu/intel/car.h>
static void main(unsigned long bist) static void main(unsigned long bist)
{ {
w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

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@ -49,6 +49,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
#include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/syspreinit.c"
#include "cpu/amd/geode_lx/msrinit.c" #include "cpu/amd/geode_lx/msrinit.c"
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {

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@ -53,6 +53,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
#include <cpu/amd/geode_lx/syspreinit.c> #include <cpu/amd/geode_lx/syspreinit.c>
#include <cpu/amd/geode_lx/msrinit.c> #include <cpu/amd/geode_lx/msrinit.c>
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
static const struct mem_controller memctrl[] = { static const struct mem_controller memctrl[] = {

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@ -53,6 +53,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
#include <cpu/amd/geode_lx/syspreinit.c> #include <cpu/amd/geode_lx/syspreinit.c>
#include <cpu/amd/geode_lx/msrinit.c> #include <cpu/amd/geode_lx/msrinit.c>
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
static const struct mem_controller memctrl[] = { static const struct mem_controller memctrl[] = {

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@ -35,6 +35,7 @@
#define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1) #define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1)
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
/* Set southbridge and Super I/O GPIOs. */ /* Set southbridge and Super I/O GPIOs. */

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@ -156,6 +156,7 @@ static void early_ich7_init(void)
RCBA32(0x2034) = reg32; RCBA32(0x2034) = reg32;
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
u32 reg32; u32 reg32;

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@ -120,6 +120,7 @@ static void early_config(void)
pci_write_config8(PCI_DEV(0, 0x1F, 2), SATA_MAP, (SATA_MODE_AHCI << 6) | (0 << 0)); pci_write_config8(PCI_DEV(0, 0x1F, 2), SATA_MAP, (SATA_MODE_AHCI << 6) | (0 << 0));
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
/* int boot_mode = 0; */ /* int boot_mode = 0; */

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@ -162,6 +162,7 @@ static void setup_sio_gpios(void)
outb(0xaa, port); outb(0xaa, port);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
int boot_mode = 0; int boot_mode = 0;

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@ -38,6 +38,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "debug.c" #include "debug.c"
#include "arch/x86/lib/stages.c" #include "arch/x86/lib/stages.c"
#include <cpu/intel/car.h>
static void main(unsigned long bist) static void main(unsigned long bist)
{ {
static const struct mem_controller mch[] = { static const struct mem_controller mch[] = {

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@ -51,6 +51,7 @@ static inline int spd_read_byte(u16 device, u8 address)
#include "arch/x86/lib/stages.c" #include "arch/x86/lib/stages.c"
#endif #endif
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
msr_t msr; msr_t msr;

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@ -51,6 +51,7 @@ static inline int spd_read_byte(u16 device, u8 address)
#define SERIAL_DEV PNP_DEV(0x4e, I3100_SP1) #define SERIAL_DEV PNP_DEV(0x4e, I3100_SP1)
#include <cpu/intel/car.h>
static void main(unsigned long bist) static void main(unsigned long bist)
{ {
msr_t msr; msr_t msr;

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@ -33,6 +33,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "lib/generic_sdram.c" #include "lib/generic_sdram.c"
// This function MUST appear last (ROMCC limitation) // This function MUST appear last (ROMCC limitation)
#include <cpu/intel/car.h>
static void main(unsigned long bist) static void main(unsigned long bist)
{ {
static const struct mem_controller memctrl[] = { static const struct mem_controller memctrl[] = {

View File

@ -332,6 +332,7 @@ static void poulsbo_setup_Stage2Regs(void)
printk(BIOS_DEBUG, " done.\n"); printk(BIOS_DEBUG, " done.\n");
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
int boot_mode = 0; int boot_mode = 0;

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@ -86,6 +86,7 @@ static const struct mem_controller ctrl = {
.channel0 = { DIMM0 }, .channel0 = { DIMM0 },
}; };
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
/* Enable multifunction for northbridge. */ /* Enable multifunction for northbridge. */

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@ -329,6 +329,7 @@ static void early_ich7_init(void)
RCBA32(0x2034) = reg32; RCBA32(0x2034) = reg32;
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
u32 reg32; u32 reg32;

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@ -159,6 +159,7 @@ static void superio_gpio_config(void)
pnp_exit_ext_func_mode(dev); pnp_exit_ext_func_mode(dev);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
int boot_mode = 0; int boot_mode = 0;

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@ -48,6 +48,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/intel/i855/raminit.c" #include "northbridge/intel/i855/raminit.c"
#include "northbridge/intel/i855/reset_test.c" #include "northbridge/intel/i855/reset_test.c"
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
if (bist == 0) { if (bist == 0) {

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@ -108,6 +108,7 @@ static void rcba_config(void)
RCBA32(BUC) = 0; RCBA32(BUC) = 0;
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
int boot_mode = 0; int boot_mode = 0;

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@ -109,6 +109,7 @@ static void rcba_config(void)
RCBA32(BUC) = 0; RCBA32(BUC) = 0;
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
int boot_mode = 0; int boot_mode = 0;

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@ -206,6 +206,7 @@ static void early_ich7_init(void)
RCBA32(0x2034) = reg32; RCBA32(0x2034) = reg32;
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
u32 reg32; u32 reg32;

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@ -215,6 +215,7 @@ static void set_fsb_frequency(void)
smbus_block_write(0x69, 0, 5, block); smbus_block_write(0x69, 0, 5, block);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
u32 reg32; u32 reg32;

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@ -148,7 +148,7 @@ init_usb (void)
outw (0x0000, DEFAULT_PMBASE | 0x003c); outw (0x0000, DEFAULT_PMBASE | 0x003c);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
int s3resume = 0; int s3resume = 0;

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@ -213,6 +213,7 @@ static void early_ich7_init(void)
RCBA32(0x2034) = reg32; RCBA32(0x2034) = reg32;
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
u32 reg32; u32 reg32;

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@ -71,6 +71,7 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
#include "cpu/amd/geode_gx2/syspreinit.c" #include "cpu/amd/geode_gx2/syspreinit.c"
#include "cpu/amd/geode_lx/msrinit.c" #include "cpu/amd/geode_lx/msrinit.c"
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
static const struct mem_controller memctrl [] = { static const struct mem_controller memctrl [] = {

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@ -110,6 +110,7 @@ static void mb_gpio_init(void)
} }
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {

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@ -152,6 +152,7 @@ static void mb_gpio_init(void)
} }
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
int err; int err;

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@ -85,6 +85,7 @@ static void mb_gpio_init(void)
} }
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {

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@ -149,6 +149,7 @@ static void mb_gpio_init(void)
} }
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
int err; int err;

View File

@ -35,6 +35,7 @@
#define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1) #define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1)
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

View File

@ -41,6 +41,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

View File

@ -41,6 +41,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

View File

@ -41,6 +41,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

View File

@ -36,6 +36,7 @@
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
#define DUMMY_DEV PNP_DEV(0x2e, 0) #define DUMMY_DEV PNP_DEV(0x2e, 0)
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
w83627hf_set_clksel_48(DUMMY_DEV); w83627hf_set_clksel_48(DUMMY_DEV);

View File

@ -34,6 +34,7 @@
#define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1) #define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1)
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

View File

@ -40,6 +40,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

View File

@ -198,6 +198,7 @@ static inline u16 read_acpi16(u32 addr)
return inw(DEFAULT_PMBASE | addr); return inw(DEFAULT_PMBASE | addr);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
u32 reg32; u32 reg32;

View File

@ -107,6 +107,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
#include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/syspreinit.c"
#include "cpu/amd/geode_lx/msrinit.c" #include "cpu/amd/geode_lx/msrinit.c"
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
static const struct mem_controller memctrl[] = { static const struct mem_controller memctrl[] = {

View File

@ -130,6 +130,7 @@ static void mb_gpio_init(void)
outl(1 << 11, GPIO_IO_BASE + GPIOH_OUTPUT_VALUE); /* Led 3 disabled */ outl(1 << 11, GPIO_IO_BASE + GPIOH_OUTPUT_VALUE); /* Led 3 disabled */
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
static const struct mem_controller memctrl[] = { static const struct mem_controller memctrl[] = {

View File

@ -94,6 +94,7 @@ static void mb_early_setup(void)
pci_write_config8(PCI_DEV(0, 0x1f, 0), ACPI_CNTL, 0x10); pci_write_config8(PCI_DEV(0, 0x1f, 0), ACPI_CNTL, 0x10);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
if (bist == 0) { if (bist == 0) {

View File

@ -251,6 +251,7 @@ static void init_artec_dongle(void)
outb(0xf4, 0x88); outb(0xf4, 0x88);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
u32 reg32; u32 reg32;

View File

@ -120,6 +120,7 @@ static void default_superio_gpio_setup(void)
outb(0x10, 0x600 + 0xb + 4); /* GP40 - GP47 */ outb(0x10, 0x600 + 0xb + 4); /* GP40 - GP47 */
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
sysinfo_t sysinfo; sysinfo_t sysinfo;

View File

@ -132,6 +132,7 @@ static void early_pch_init(void)
pci_write_config8(PCH_LPC_DEV, 0xa4, reg8); pci_write_config8(PCH_LPC_DEV, 0xa4, reg8);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
int boot_mode = 0; int boot_mode = 0;

View File

@ -172,6 +172,7 @@ static void setup_sio_gpios(void)
it8772f_gpio_setup(DUMMY_DEV, 6, 0x00, 0x00, 0x00, 0x00, 0x00); it8772f_gpio_setup(DUMMY_DEV, 6, 0x00, 0x00, 0x00, 0x00, 0x00);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
int boot_mode = 0; int boot_mode = 0;

View File

@ -40,6 +40,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
it8671f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); it8671f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

View File

@ -42,6 +42,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "lib/generic_sdram.c" #include "lib/generic_sdram.c"
#include "arch/x86/lib/stages.c" #include "arch/x86/lib/stages.c"
#include <cpu/intel/car.h>
static void main(unsigned long bist) static void main(unsigned long bist)
{ {
static const struct mem_controller mch[] = { static const struct mem_controller mch[] = {

View File

@ -46,6 +46,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "lib/generic_sdram.c" #include "lib/generic_sdram.c"
#include "arch/x86/lib/stages.c" #include "arch/x86/lib/stages.c"
#include <cpu/intel/car.h>
static void main(unsigned long bist) static void main(unsigned long bist)
{ {
static const struct mem_controller mch[] = { static const struct mem_controller mch[] = {

View File

@ -43,6 +43,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "lib/generic_sdram.c" #include "lib/generic_sdram.c"
#include "arch/x86/lib/stages.c" #include "arch/x86/lib/stages.c"
#include <cpu/intel/car.h>
static void main(unsigned long bist) static void main(unsigned long bist)
{ {
static const struct mem_controller mch[] = { static const struct mem_controller mch[] = {

View File

@ -45,6 +45,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "lib/generic_sdram.c" #include "lib/generic_sdram.c"
#include "arch/x86/lib/stages.c" #include "arch/x86/lib/stages.c"
#include <cpu/intel/car.h>
static void main(unsigned long bist) static void main(unsigned long bist)
{ {
static const struct mem_controller mch[] = { static const struct mem_controller mch[] = {

View File

@ -45,6 +45,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "lib/generic_sdram.c" #include "lib/generic_sdram.c"
#include "arch/x86/lib/stages.c" #include "arch/x86/lib/stages.c"
#include <cpu/intel/car.h>
static void main(unsigned long bist) static void main(unsigned long bist)
{ {
static const struct mem_controller mch[] = { static const struct mem_controller mch[] = {

View File

@ -111,6 +111,7 @@ int mainboard_set_fbd_clock(int speed)
} }
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
if (bist == 0) if (bist == 0)

View File

@ -136,6 +136,7 @@ static void hard_reset(void)
while (1) ; while (1) ;
} }
#include <cpu/intel/car.h>
static void main(unsigned long bist) static void main(unsigned long bist)
{ {
volatile int i; volatile int i;

View File

@ -31,6 +31,7 @@
#define SERIAL_DEV PNP_DEV(0x2e, PC97317_SP1) #define SERIAL_DEV PNP_DEV(0x2e, PC97317_SP1)
#include <cpu/intel/car.h>
static void main(unsigned long bist) static void main(unsigned long bist)
{ {
pc97317_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); pc97317_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

View File

@ -92,6 +92,7 @@ static void mb_early_setup(void)
pci_write_config8(PCI_DEV(0, 0x1f, 0), ACPI_CNTL, 0x10); pci_write_config8(PCI_DEV(0, 0x1f, 0), ACPI_CNTL, 0x10);
} }
#include <cpu/intel/car.h>
void main(unsigned long bist) void main(unsigned long bist)
{ {
if (bist == 0) { if (bist == 0) {

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