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mb/protectli/vault_cml: Use chipset dt reference names 

Use the references from the chipset devicetree as this makes the
comments superfluous.

Change-Id: I76ec42fccfa42bbe3943e048968a76eec3584ee8
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80054
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
This commit is contained in:
Felix Singer 2024-01-18 07:02:49 +01:00 committed by Felix Singer
parent d759f96587
commit 1b0114b3e9
1 changed files with 53 additions and 53 deletions
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106
src/mainboard/protectli/vault_cml/devicetree.cb
View File

@ -141,57 +141,57 @@ chip soc/intel/cannonlake
device cpu_cluster 0 on end
device domain 0 on
device pci 00.0 on end # Host Bridge
device pci 02.0 on end # Integrated Graphics Device
device pci 04.0 on end # SA Thermal device
device pci 08.0 off end # Gaussian Mixture Model
device pci 12.0 on end # Thermal Subsystem
device pci 12.5 off end # UFS SCS
device pci 12.6 off end # GSPI #2
device pci 14.0 on end # USB xHCI
device pci 14.1 off end # USB xDCI (OTG)
device pci 14.5 off end # SDCard
device pci 15.0 off end # I2C #0
device pci 15.1 off end # I2C #1
device pci 15.2 off end # I2C #2
device pci 15.3 off end # I2C #3
device pci 16.0 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT Redirection
device pci 16.4 off end # Management Engine Interface 3
device pci 16.5 off end # Management Engine Interface 4
device pci 17.0 on end # SATA
device pci 19.0 off end # I2C #4
device pci 19.1 off end # I2C #5
device pci 19.2 off end # UART #2
device pci 1a.0 on end # eMMC
device pci 1c.0 off end # PCI Express Port 1
device pci 1c.1 off end # PCI Express Port 2
device pci 1c.2 off end # PCI Express Port 3
device pci 1c.3 off end # PCI Express Port 4
device pci 1c.4 on end # PCI Express Port 5 LAN1
device pci 1c.5 on end # PCI Express Port 6 LAN2
device pci 1c.6 on end # PCI Express Port 7 LAN3
device pci 1c.7 on end # PCI Express Port 8 LAN4
device pci 1d.0 on end # PCI Express Port 9 LAN5
device pci 1d.1 on end # PCI Express Port 10 LAN6
device pci 1d.2 off end # PCI Express Port 11
device pci 1d.3 on end # PCI Express Port 12 M.2 WiFi
device ref system_agent on end
device ref igpu on end
device ref dptf on end
device ref gna off end
device ref thermal on end
device ref ufs off end
device ref gspi2 off end
device ref xhci on end
device ref xdci off end
device ref sdxc off end
device ref i2c0 off end
device ref i2c1 off end
device ref i2c2 off end
device ref i2c3 off end
device ref heci1 on end
device ref heci2 off end
device ref csme_ider off end
device ref csme_ktr off end
device ref heci3 off end
device ref heci4 off end
device ref sata on end
device ref i2c4 off end
device ref i2c5 off end
device ref uart2 off end
device ref emmc on end
device ref pcie_rp1 off end
device ref pcie_rp2 off end
device ref pcie_rp3 off end
device ref pcie_rp4 off end
device ref pcie_rp5 on end # LAN1
device ref pcie_rp6 on end # LAN2
device ref pcie_rp7 on end # LAN3
device ref pcie_rp8 on end # LAN4
device ref pcie_rp9 on end # LAN5
device ref pcie_rp10 on end # LAN6
device ref pcie_rp11 off end
device ref pcie_rp12 on end
smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther"
"M.2/E 2230 (M2_WIFI2)" "SlotDataBusWidth1X"
device pci 1d.4 on # PCI Express Port 13 NVMe
device ref pcie_rp13 on # NVMe
smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther"
"M.2/M 2280 (J1)" "SlotDataBusWidth4X"
end
device pci 1d.5 off end # PCI Express Port 14
device pci 1d.6 off end # PCI Express Port 15
device pci 1d.7 off end # PCI Express Port 16
device pci 1e.0 off end # UART #0
device pci 1e.1 off end # UART #1
device pci 1e.2 off end # GSPI #0
device pci 1e.3 off end # GSPI #1
device pci 1f.0 on
device ref pcie_rp14 off end
device ref pcie_rp15 off end
device ref pcie_rp16 off end
device ref uart0 off end
device ref uart1 off end
device ref gspi0 off end
device ref gspi1 off end
device ref lpc_espi on
chip superio/ite/it8784e
register "TMPIN1.mode" = "THERMAL_RESISTOR"
register "TMPIN2.mode" = "THERMAL_MODE_DISABLED"
@ -231,12 +231,12 @@ chip soc/intel/cannonlake
chip drivers/pc80/tpm
device pnp 0c31.0 on end
end
end # LPC Interface
device pci 1f.1 hidden end # P2SB
device pci 1f.2 hidden end # Power Management Controller
device pci 1f.3 on end # Intel HDA
device pci 1f.4 on end # SMBus
device pci 1f.5 on end # PCH SPI
device pci 1f.6 off end # GbE
end
device ref p2sb hidden end
device ref pmc hidden end
device ref hda on end
device ref smbus on end
device ref fast_spi on end
device ref gbe off end
end
end