GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/system76/adl/dt: Use comma separated list for arrays 

In order to improve the readability of the settings, use a comma
separated list to assign values to their indexes instead of repeating
the option name for each index.

Don't convert the settings for PCIe root ports as they should stay in
the device scope of them.

While on it, remove superfluous comments related to modified lines.

Change-Id: I2f641ce1fc44a9d7c9f9c403d255997214021f47
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78668
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Crawford <tcrawford@system76.com>
This commit is contained in:
Felix Singer 2023-10-26 16:32:19 +02:00 committed by Felix Singer
parent 983b169a36
commit 1b102cae36
7 changed files with 100 additions and 86 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

26
src/mainboard/system76/adl/variants/darp8/overridetree.cb
View File

@ -39,18 +39,20 @@ chip soc/intel/alderlake
end end
end end
device ref xhci on device ref xhci on
# USB2 register "usb2_ports" = "{
register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Motherboard [0] = USB2_PORT_MID(OC_SKIP), /* Type-A Motherboard */
register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Multi Board [1] = USB2_PORT_MID(OC_SKIP), /* Type-A Multi Board */
register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC_SKIP)" # J_TYPEC1 (USB 3.2 Gen 2) [2] = USB2_PORT_TYPE_C(OC_SKIP), /* J_TYPEC1 (USB 3.2 Gen 2) */
register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # Fingerprint [4] = USB2_PORT_MID(OC_SKIP), /* Fingerprint */
register "usb2_ports[5]" = "USB2_PORT_TYPE_C(OC_SKIP)" # J_TYPEC2 (Thunderbolt) [5] = USB2_PORT_TYPE_C(OC_SKIP), /* J_TYPEC2 (Thunderbolt) */
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Camera [6] = USB2_PORT_MID(OC_SKIP), /* Camera */
register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth [9] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */
# USB3 }"
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Motherboard register "usb3_ports" = "{
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_TYPEC1 CH1 [0] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-A Motherboard */
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_TYPEC1 CH2 [1] = USB3_PORT_DEFAULT(OC_SKIP), /* J_TYPEC1 CH1 */
[2] = USB3_PORT_DEFAULT(OC_SKIP), /* J_TYPEC1 CH2 */
}"
# ACPI # ACPI
chip drivers/usb/acpi chip drivers/usb/acpi
device ref xhci_root_hub on device ref xhci_root_hub on

26
src/mainboard/system76/adl/variants/galp6/overridetree.cb
View File

@ -46,18 +46,20 @@ chip soc/intel/alderlake
end end
end end
device ref xhci on device ref xhci on
# USB2 register "usb2_ports" = "{
register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # J_USB3_2 [0] = USB2_PORT_MID(OC_SKIP), /* J_USB3_2 */
register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # J_TYPEC1 [1] = USB2_PORT_TYPE_C(OC_SKIP), /* J_TYPEC1 */
register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # J_USB3_1 [2] = USB2_PORT_MID(OC_SKIP), /* J_USB3_1 */
register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # Fingerprint [4] = USB2_PORT_MID(OC_SKIP), /* Fingerprint */
register "usb2_ports[5]" = "USB2_PORT_TYPE_C(OC_SKIP)" # J_TYPEC2 [5] = USB2_PORT_TYPE_C(OC_SKIP), /* J_TYPEC2 */
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Camera [6] = USB2_PORT_MID(OC_SKIP), /* Camera */
register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth [9] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */
# USB3 }"
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A register "usb3_ports" = "{
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A [0] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-A */
register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C [2] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-A */
[3] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-C */
}"
# ACPI # ACPI
chip drivers/usb/acpi chip drivers/usb/acpi
device ref xhci_root_hub on device ref xhci_root_hub on

28
src/mainboard/system76/adl/variants/gaze17-3050/overridetree.cb
View File

@ -76,19 +76,21 @@ chip soc/intel/alderlake
end end
end end
device ref xhci on device ref xhci on
# USB2 register "usb2_ports" = "{
register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC_SKIP)" # J_TYPEC1 [2] = USB2_PORT_TYPE_C(OC_SKIP), /* J_TYPEC1 */
register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # USB 3.2 Type-A audio board [4] = USB2_PORT_MID(OC_SKIP), /* USB 3.2 Type-A audio board */
register "usb2_ports[5]" = "USB2_PORT_TYPE_C(OC_SKIP)" # J_TYPEC2 [5] = USB2_PORT_TYPE_C(OC_SKIP), /* J_TYPEC2 */
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Fingerprint [6] = USB2_PORT_MID(OC_SKIP), /* Fingerprint */
register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Camera [7] = USB2_PORT_MID(OC_SKIP), /* Camera */
register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)" # USB 2.0 Type-A audio board [8] = USB2_PORT_MID(OC_SKIP), /* USB 2.0 Type-A audio board */
register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth [9] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */
# USB3 }"
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB 3.2 Type-A audio board register "usb3_ports" = "{
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_TYPEC2 [0] = USB3_PORT_DEFAULT(OC_SKIP), /* USB 3.2 Type-A audio board */
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_TYPEC1 [1] = USB3_PORT_DEFAULT(OC_SKIP), /* J_TYPEC2 */
register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_TYPEC1 [2] = USB3_PORT_DEFAULT(OC_SKIP), /* J_TYPEC1 */
[3] = USB3_PORT_DEFAULT(OC_SKIP), /* J_TYPEC1 */
}"
end end
device ref pcie_rp5 on device ref pcie_rp5 on
# PCIe RP#5 x4, Clock 1 (SSD) # PCIe RP#5 x4, Clock 1 (SSD)

26
src/mainboard/system76/adl/variants/gaze17-3060-b/overridetree.cb
View File

@ -83,18 +83,20 @@ chip soc/intel/alderlake
end end
device ref tcss_dma0 on end device ref tcss_dma0 on end
device ref xhci on device ref xhci on
# USB2 register "usb2_ports" = "{
register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # USB 3.2 Type-A audio board [0] = USB2_PORT_MID(OC_SKIP), /* USB 3.2 Type-A audio board */
register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB 3.2 Type-C [2] = USB2_PORT_TYPE_C(OC_SKIP), /* USB 3.2 Type-C */
register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # USB 2.0 Type-A audio board [5] = USB2_PORT_MID(OC_SKIP), /* USB 2.0 Type-A audio board */
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Fingerprint [6] = USB2_PORT_MID(OC_SKIP), /* Fingerprint */
register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Camera [7] = USB2_PORT_MID(OC_SKIP), /* Camera */
register "usb2_ports[8]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Thunderbolt Type-C [8] = USB2_PORT_TYPE_C(OC_SKIP), /* Thunderbolt Type-C */
register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth [9] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */
# USB3 }"
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB 3.2 Type-A audio board register "usb3_ports" = "{
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB 3.2 Type-C side A [0] = USB3_PORT_DEFAULT(OC_SKIP), /* USB 3.2 Type-A audio board */
register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB 3.2 Type-C side B [2] = USB3_PORT_DEFAULT(OC_SKIP), /* USB 3.2 Type-C side A */
[3] = USB3_PORT_DEFAULT(OC_SKIP), /* USB 3.2 Type-C side B */
}"
end end
device ref pcie_rp5 on device ref pcie_rp5 on
# PCIe root port #5 x1, Clock 2 (WLAN) # PCIe root port #5 x1, Clock 2 (WLAN)

24
src/mainboard/system76/adl/variants/lemp11/overridetree.cb
View File

@ -39,17 +39,19 @@ chip soc/intel/alderlake
end end
end end
device ref xhci on device ref xhci on
# USB2 register "usb2_ports" = "{
register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Left [0] = USB2_PORT_MID(OC_SKIP), /* Type-A Left */
register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Right [1] = USB2_PORT_MID(OC_SKIP), /* Type-A Right */
register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC_SKIP)" # J_TYPEC1 [2] = USB2_PORT_TYPE_C(OC_SKIP), /* J_TYPEC1 */
register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # 3G/LTE [3] = USB2_PORT_MID(OC_SKIP), /* 3G/LTE */
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Camera [6] = USB2_PORT_MID(OC_SKIP), /* Camera */
register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth [9] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */
# USB3 }"
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Left register "usb3_ports" = "{
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Right [0] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-A Left */
register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # 3G/LTE [1] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-A Right */
[3] = USB3_PORT_DEFAULT(OC_SKIP), /* 3G/LTE */
}"
# ACPI # ACPI
chip drivers/usb/acpi chip drivers/usb/acpi
device ref xhci_root_hub on device ref xhci_root_hub on

28
src/mainboard/system76/adl/variants/oryp10/overridetree.cb
View File

@ -64,19 +64,21 @@ chip soc/intel/alderlake
end end
end end
device ref xhci on device ref xhci on
# USB2 register "usb2_ports" = "{
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # TYPEC1 (USB 3.2 Gen2) [0] = USB2_PORT_TYPE_C(OC_SKIP), /* TYPEC1 (USB 3.2 Gen2) */
register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # J_USB2 [1] = USB2_PORT_MID(OC_SKIP), /* J_USB2 */
register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # J_USB1 [2] = USB2_PORT_MID(OC_SKIP), /* J_USB1 */
register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Per-KB [5] = USB2_PORT_MID(OC_SKIP), /* Per-KB */
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Fingerprint [6] = USB2_PORT_MID(OC_SKIP), /* Fingerprint */
register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Camera [7] = USB2_PORT_MID(OC_SKIP), /* Camera */
register "usb2_ports[8]" = "USB2_PORT_TYPE_C(OC_SKIP)" # TYPEC2 (Thunderbolt) [8] = USB2_PORT_TYPE_C(OC_SKIP), /* TYPEC2 (Thunderbolt) */
register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth [9] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */
# USB3 }"
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # TYPEC1 (USB 3.2 Gen2) register "usb3_ports" = "{
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_USB2 [0] = USB3_PORT_DEFAULT(OC_SKIP), /* TYPEC1 (USB 3.2 Gen2) */
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_USB1 [1] = USB3_PORT_DEFAULT(OC_SKIP), /* J_USB2 */
[2] = USB3_PORT_DEFAULT(OC_SKIP), /* J_USB1 */
}"
# ACPI # ACPI
chip drivers/usb/acpi chip drivers/usb/acpi
device ref xhci_root_hub on device ref xhci_root_hub on

28
src/mainboard/system76/adl/variants/oryp9/overridetree.cb
View File

@ -64,19 +64,21 @@ chip soc/intel/alderlake
end end
end end
device ref xhci on device ref xhci on
# USB2 register "usb2_ports" = "{
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # TYPEC1 (USB 3.2 Gen2) [0] = USB2_PORT_TYPE_C(OC_SKIP), /* TYPEC1 (USB 3.2 Gen2) */
register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # J_USB2 [1] = USB2_PORT_MID(OC_SKIP), /* J_USB2 */
register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # J_USB1 [2] = USB2_PORT_MID(OC_SKIP), /* J_USB1 */
register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Per-KB [5] = USB2_PORT_MID(OC_SKIP), /* Per-KB */
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Fingerprint [6] = USB2_PORT_MID(OC_SKIP), /* Fingerprint */
register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Camera [7] = USB2_PORT_MID(OC_SKIP), /* Camera */
register "usb2_ports[8]" = "USB2_PORT_TYPE_C(OC_SKIP)" # TYPEC2 (Thunderbolt) [8] = USB2_PORT_TYPE_C(OC_SKIP), /* TYPEC2 (Thunderbolt) */
register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth [9] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */
# USB3 }"
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # TYPEC1 (USB 3.2 Gen2) register "usb3_ports" = "{
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_USB2 [0] = USB3_PORT_DEFAULT(OC_SKIP), /* TYPEC1 (USB 3.2 Gen2) */
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_USB1 [1] = USB3_PORT_DEFAULT(OC_SKIP), /* J_USB2 */
[2] = USB3_PORT_DEFAULT(OC_SKIP), /* J_USB1 */
}"
# ACPI # ACPI
chip drivers/usb/acpi chip drivers/usb/acpi
device ref xhci_root_hub on device ref xhci_root_hub on