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soc/intel/common: Use SPR for backing up data way and eviction mask 

This patch replaces the usage of GPR (General Purpose Registers) like
ECX and EBX for backing up data way and non-eviction mask with SPR
(Special Purpose Registers) EDI and ESI.

Purpose of this change is to ensure the safety while developers might
use ECX often while doing rdmsr/wrmsr rather than making use of EDI.

TEST=Able to boot JSL and TGL platform without any hang using eNEM.

Change-Id: I12e0cb7bb050e4f7b17ecf30108db335d1d82ab7
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56161
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2021-07-08 12:50:42 +05:30 committed by Patrick Georgi
parent 801aa96879
commit 1b12d785da
1 changed files with 6 additions and 6 deletions
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12
src/soc/intel/common/block/cpu/car/cache_as_ram.S
View File

@ -514,15 +514,15 @@ find_llc_subleaf:
subl $0x01, %eax
set_eviction_mask:
mov %ebx, %ecx /* back up number of ways */
mov %eax, %ebx /* back up the non-eviction mask*/
mov %ebx, %edi /* back up number of ways */
mov %eax, %esi /* back up the non-eviction mask*/
#if CONFIG(CAR_HAS_SF_MASKS)
mov %ecx, %edi /* use number of ways to prepare SF mask */
/*
* SF mask is programmed with the double number of bits than
* the number of ways
*/
mov $0x01, %eax
mov %edi, %ecx
shl %cl, %eax
shl %cl, %eax
subl $0x01, %eax /* contains SF mask */
@ -533,7 +533,6 @@ set_eviction_mask:
movl $IA32_CR_SF_QOS_MASK_1, %ecx
xorl %edx, %edx
wrmsr
mov %edi, %ecx /* restore number of ways */
#endif
/*
* Program MSR 0xC91 IA32_L3_MASK_1
@ -542,10 +541,11 @@ set_eviction_mask:
* - If this bit is '1' - the way is not protected from eviction
*/
mov $0x1, %eax
mov %edi, %ecx
shl %cl, %eax
subl $0x01, %eax
mov %eax, %ecx
mov %ebx, %eax
mov %esi, %eax
xor $~0, %eax /* invert 32 bits */
and %ecx, %eax
@ -558,7 +558,7 @@ set_eviction_mask:
* - If this bit is '0' - the way is protected from eviction
* - If this bit is '1' - the way is not protected from eviction
*/
mov %ebx, %eax
mov %esi, %eax
movl $IA32_L3_MASK_2, %ecx
xorl %edx, %edx
wrmsr