AGESA: Remove redundant Avalon support from Hudson
Avalon support now lives under pi/avalon so we can restore Hudson to the state before it was added there. Change-Id: Id96973f3458fae162232c160e602595b58c43027 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7389 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
This commit is contained in:
parent
e8b4da2f6f
commit
1b1b795f97
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@ -18,4 +18,3 @@
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#
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#
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subdirs-$(CONFIG_SOUTHBRIDGE_AMD_AGESA_HUDSON) += hudson
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subdirs-$(CONFIG_SOUTHBRIDGE_AMD_AGESA_HUDSON) += hudson
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subdirs-$(CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE) += hudson
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subdirs-$(CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE) += hudson
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subdirs-$(CONFIG_SOUTHBRIDGE_AMD_AGESA_AVALON) += hudson
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@ -29,13 +29,7 @@ config SOUTHBRIDGE_AMD_AGESA_YANGTZE
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select HAVE_USBDEBUG_OPTIONS
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select HAVE_USBDEBUG_OPTIONS
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select HAVE_HARD_RESET
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select HAVE_HARD_RESET
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config SOUTHBRIDGE_AMD_AGESA_AVALON
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if SOUTHBRIDGE_AMD_AGESA_HUDSON || SOUTHBRIDGE_AMD_AGESA_YANGTZE
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bool
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select IOAPIC
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select HAVE_USBDEBUG_OPTIONS
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select HAVE_HARD_RESET
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if SOUTHBRIDGE_AMD_AGESA_HUDSON || SOUTHBRIDGE_AMD_AGESA_YANGTZE || SOUTHBRIDGE_AMD_AGESA_AVALON
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config BOOTBLOCK_SOUTHBRIDGE_INIT
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config BOOTBLOCK_SOUTHBRIDGE_INIT
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string
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string
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@ -65,13 +59,8 @@ config HUDSON_XHCI_FWM
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help
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help
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Add Hudson 2/3/4 XHCI Firmware to support the onboard USB 3.0
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Add Hudson 2/3/4 XHCI Firmware to support the onboard USB 3.0
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config HUDSON_DISABLE_IMC
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bool
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default n
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config HUDSON_IMC_FWM
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config HUDSON_IMC_FWM
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bool "Add IMC firmware"
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bool "Add imc firmware"
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depends on !HUDSON_DISABLE_IMC
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default y
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default y
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help
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help
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Add Hudson 2/3/4 IMC Firmware to support the onboard fan control
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Add Hudson 2/3/4 IMC Firmware to support the onboard fan control
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@ -83,22 +72,16 @@ config HUDSON_GEC_FWM
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Add Hudson 2/3/4 GEC Firmware to support the onboard gigabit Ethernet MAC.
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Add Hudson 2/3/4 GEC Firmware to support the onboard gigabit Ethernet MAC.
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Must be connected to a Broadcom B50610 or B50610M PHY on the motherboard.
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Must be connected to a Broadcom B50610 or B50610M PHY on the motherboard.
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config HUDSON_PSP
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bool
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default y if CPU_AMD_PI_00730F01
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config HUDSON_XHCI_FWM_FILE
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config HUDSON_XHCI_FWM_FILE
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string "XHCI firmware path and filename"
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string "XHCI firmware path and filename"
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default "3rdparty/southbridge/amd/hudson/xhci.bin" if SOUTHBRIDGE_AMD_AGESA_HUDSON
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default "3rdparty/southbridge/amd/hudson/xhci.bin" if SOUTHBRIDGE_AMD_AGESA_HUDSON
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default "3rdparty/southbridge/amd/yangtze/xhci.bin" if SOUTHBRIDGE_AMD_AGESA_YANGTZE
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default "3rdparty/southbridge/amd/yangtze/xhci.bin" if SOUTHBRIDGE_AMD_AGESA_YANGTZE
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default "3rdparty/southbridge/amd/avalon/xhci.bin" if SOUTHBRIDGE_AMD_AGESA_AVALON
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depends on HUDSON_XHCI_FWM
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depends on HUDSON_XHCI_FWM
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config HUDSON_IMC_FWM_FILE
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config HUDSON_IMC_FWM_FILE
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string "IMC firmware path and filename"
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string "IMC firmware path and filename"
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default "3rdparty/southbridge/amd/hudson/imc.bin" if SOUTHBRIDGE_AMD_AGESA_HUDSON
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default "3rdparty/southbridge/amd/hudson/imc.bin" if SOUTHBRIDGE_AMD_AGESA_HUDSON
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default "3rdparty/southbridge/amd/yangtze/imc.bin" if SOUTHBRIDGE_AMD_AGESA_YANGTZE
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default "3rdparty/southbridge/amd/yangtze/imc.bin" if SOUTHBRIDGE_AMD_AGESA_YANGTZE
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default "3rdparty/southbridge/amd/avalon/imc.bin" if SOUTHBRIDGE_AMD_AGESA_AVALON
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depends on HUDSON_IMC_FWM
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depends on HUDSON_IMC_FWM
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config HUDSON_GEC_FWM_FILE
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config HUDSON_GEC_FWM_FILE
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@ -109,7 +92,7 @@ config HUDSON_GEC_FWM_FILE
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config HUDSON_FWM
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config HUDSON_FWM
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bool
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bool
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default y if HUDSON_XHCI_FWM || HUDSON_IMC_FWM || HUDSON_GEC_FWM || HUDSON_PSP
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default y if HUDSON_XHCI_FWM || HUDSON_IMC_FWM || HUDSON_GEC_FWM
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default n
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default n
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if HUDSON_FWM
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if HUDSON_FWM
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@ -135,11 +118,6 @@ config HUDSON_FWM_POSITION
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0xFF020000 if flash chip size is 16M
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0xFF020000 if flash chip size is 16M
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endif # HUDSON_FWM
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endif # HUDSON_FWM
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config AMD_PUBKEY_FILE
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depends on HUDSON_PSP
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string "AMD public Key"
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default "3rdparty/southbridge/amd/avalon/PSP/AmdPubKey.bin" if CPU_AMD_PI_00730F01
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config HUDSON_SATA_MODE
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config HUDSON_SATA_MODE
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int "SATA Mode"
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int "SATA Mode"
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default 0
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default 0
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@ -230,9 +208,9 @@ config ACPI_ENABLE_THERMAL_ZONE
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bool
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bool
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default y
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default y
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endif # SOUTHBRIDGE_AMD_AGESA_HUDSON || SOUTHBRIDGE_AMD_AGESA_YANGTZE || SOUTHBRIDGE_AMD_AGESA_AVALON
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endif # SOUTHBRIDGE_AMD_AGESA_HUDSON || SOUTHBRIDGE_AMD_AGESA_YANGTZE
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if SOUTHBRIDGE_AMD_AGESA_YANGTZE || SOUTHBRIDGE_AMD_AGESA_AVALON
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if SOUTHBRIDGE_AMD_AGESA_YANGTZE
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config AZ_PIN
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config AZ_PIN
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hex
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hex
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default 0xaa
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default 0xaa
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@ -1,35 +1,3 @@
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#*****************************************************************************
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#
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# Copyright (c) 2012, Advanced Micro Devices, Inc.
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# 2013 - 2014, Sage Electronic Engineering, LLC
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are met:
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# * Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# * Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution.
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# * Neither the name of Advanced Micro Devices, Inc. nor the names of
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# its contributors may be used to endorse or promote products derived
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# from this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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# DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
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# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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#*****************************************************************************
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INCLUDES += -Isrc/southbridge/amd/agesa/hudson
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romstage-y += smbus.c smbus_spd.c
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romstage-y += smbus.c smbus_spd.c
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ramstage-y += hudson.c
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ramstage-y += hudson.c
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ramstage-y += usb.c
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ramstage-y += usb.c
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@ -49,10 +17,10 @@ ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
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romstage-y += early_setup.c
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romstage-y += early_setup.c
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ramstage-$(CONFIG_SPI_FLASH) += spi.c
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ramstage-$(CONFIG_SPI_FLASH) += spi.c
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ramstage-$(CONFIG_HAVE_ACPI_RESUME) += resume.c
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ramstage-y += resume.c
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romstage-$(CONFIG_HUDSON_IMC_FWM) += imc.c
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romstage-y += imc.c
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ramstage-$(CONFIG_HUDSON_IMC_FWM) += imc.c
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ramstage-y += imc.c
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smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c smi_util.c
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smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c smi_util.c
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ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c smi_util.c
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ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c smi_util.c
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@ -61,14 +29,7 @@ ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c smi_util.c
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# +-----------+---------------+----------------+------------+
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# +-----------+---------------+----------------+------------+
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# |0x55AA55AA |EC ROM Address |GEC ROM Address |USB3 ROM |
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# |0x55AA55AA |EC ROM Address |GEC ROM Address |USB3 ROM |
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# +-----------+---------------+----------------+------------+
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# +-----------+---------------+----------------+------------+
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# |PSPDIR ADDR|
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# +-----------+
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#
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# EC ROM should be 64K aligned.
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# EC ROM should be 64K aligned.
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# HVB(Hardware Validated Boot) or Bypass
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CONFIG_HVB=Bypass
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HUDSON_FWM_POSITION=$(shell printf %u $(CONFIG_HUDSON_FWM_POSITION))
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HUDSON_FWM_POSITION=$(shell printf %u $(CONFIG_HUDSON_FWM_POSITION))
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#assume the cbfs header is less than 128 bytes.
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#assume the cbfs header is less than 128 bytes.
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HUDSON_IMC_POSITION=0
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HUDSON_IMC_POSITION=0
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endif
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endif
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HUDSON_PSP_DIRECTORY_POSITION=0
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ifeq ($(CONFIG_CPU_AMD_PI_00730F01), y)
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HUDSON_PSP_DIRECTORY_POSITION=$(call int-add,$(HUDSON_FWM_POSITION) 262144)
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endif
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$(obj)/coreboot_hudson_romsig.bin: $(call strip_quotes, $(CONFIG_HUDSON_XHCI_FWM_FILE)) \
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$(obj)/coreboot_hudson_romsig.bin: $(call strip_quotes, $(CONFIG_HUDSON_XHCI_FWM_FILE)) \
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$(call strip_quotes, $(CONFIG_HUDSON_IMC_FWM_FILE)) \
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$(call strip_quotes, $(CONFIG_HUDSON_IMC_FWM_FILE)) \
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$(call strip_quotes, $(CONFIG_HUDSON_GEC_FWM_FILE)) \
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$(call strip_quotes, $(CONFIG_HUDSON_GEC_FWM_FILE)) \
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@ -113,8 +69,7 @@ $(obj)/coreboot_hudson_romsig.bin: $(call strip_quotes, $(CONFIG_HUDSON_XHCI_FWM
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for fwm in 1437226410 \
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for fwm in 1437226410 \
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$(HUDSON_IMC_POSITION) \
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$(HUDSON_IMC_POSITION) \
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$(HUDSON_GEC_POSITION) \
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$(HUDSON_GEC_POSITION) \
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$(HUDSON_XHCI_POSITION) \
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$(HUDSON_XHCI_POSITION) ; do \
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$(HUDSON_PSP_DIRECTORY_POSITION); do \
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echo $$fwm | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'; \
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echo $$fwm | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'; \
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done > $@
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done > $@
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@ -156,152 +111,3 @@ pci$(stripped_ahci_rom_id).rom-file := $(call strip_quotes,$(CONFIG_AHCI_ROM_FIL
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pci$(stripped_ahci_rom_id).rom-type := optionrom
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pci$(stripped_ahci_rom_id).rom-type := optionrom
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pci$(stripped_ahci_rom_id).rom-required := Hudson AHCI Option ROM (Contact your AMD representative)
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pci$(stripped_ahci_rom_id).rom-required := Hudson AHCI Option ROM (Contact your AMD representative)
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endif
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endif
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ifeq ($(CONFIG_HUDSON_PSP), y)
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# 0
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# catenate the pubkey and pspdir together to save some space.
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AMDPUBKEY_POS=$(call int-add,$(HUDSON_PSP_DIRECTORY_POSITION) 0x100) #$(shell printf %u 0xFFb00100)
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AMDPUBKEY_SIZE=$(call file-size,$(CONFIG_AMD_PUBKEY_FILE))
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ifeq ($(CONFIG_CPU_AMD_PI_00730F01), y)
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FIRMWARE_LOCATE=$(dir $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)))
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FIRMWARE_TYPE=
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endif
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# 1
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CONFIG_PSPBTLDR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspBootLoader$(FIRMWARE_TYPE).$(CONFIG_HVB).sbin
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PSPBTLDR_POS=$(call int-add,$(HUDSON_PSP_DIRECTORY_POSITION) 0x1000) #$(shell printf %u 0xFFb10000)
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PSPBTLDR_SIZE=$(call file-size,$(CONFIG_PSPBTLDR_FILE))
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cbfs-files-y += hudson/pspbtldr
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hudson/pspbtldr-file := $(CONFIG_PSPBTLDR_FILE)
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hudson/pspbtldr-position := $(PSPBTLDR_POS)
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hudson/pspbtldr-type := raw
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#8
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CONFIG_SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE).sbin
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SMUFWM_POS=$(call int-add,$(HUDSON_PSP_DIRECTORY_POSITION) 0xb000) #$(shell printf %u 0xFFb20000)
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SMUFWM_SIZE=$(call file-size,$(CONFIG_SMUFWM_FILE))
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cbfs-files-y += hudson/smufwm
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hudson/smufwm-file := $(CONFIG_SMUFWM_FILE)
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hudson/smufwm-position := $(SMUFWM_POS)
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hudson/smufwm-type := raw
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#3
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CONFIG_PSPRCVR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspRecovery$(FIRMWARE_TYPE).sbin
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PSPRCVR_POS=$(call int-add,$(HUDSON_PSP_DIRECTORY_POSITION) 0x30000) #$(shell printf %u 0xFFBb0000)
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PSPRCVR_SIZE=$(call file-size,$(CONFIG_PSPRCVR_FILE))
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cbfs-files-y += hudson/psprcvr
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hudson/psprcvr-file := $(CONFIG_PSPRCVR_FILE)
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hudson/psprcvr-position := $(PSPRCVR_POS)
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hudson/psprcvr-type := raw
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# 5
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CONFIG_PUBSIGNEDKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/RtmPubSigned$(FIRMWARE_TYPE).key
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PUBSIGNEDKEY_POS=$(call int-add,$(HUDSON_PSP_DIRECTORY_POSITION) 0x400) #$(shell printf %u 0xFFb00400)
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PUBSIGNEDKEY_SIZE=$(call file-size,$(CONFIG_PUBSIGNEDKEY_FILE))
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cbfs-files-y += hudson/pubsignedkey
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hudson/pubsignedkey-file := $(CONFIG_PUBSIGNEDKEY_FILE)
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hudson/pubsignedkey-position := $(PUBSIGNEDKEY_POS)
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hudson/pubsignedkey-type := raw
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# 2
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CONFIG_PSPSCUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureOs$(FIRMWARE_TYPE).sbin
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PSPSECUREOS_POS=$(call int-add,$(HUDSON_PSP_DIRECTORY_POSITION) 0x3A000) #$(shell printf %u 0xFFbc0000)
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PSPSECUREOS_SIZE=$(call file-size,$(CONFIG_PSPSCUREOS_FILE))
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cbfs-files-y += hudson/pspsecureos
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hudson/pspsecureos-file := $(CONFIG_PSPSCUREOS_FILE)
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hudson/pspsecureos-position := $(PSPSECUREOS_POS)
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hudson/pspsecureos-type := raw
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# 4
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CONFIG_PSPNVRAM_FILE=$(top)/$(FIRMWARE_LOCATE)/PspNvram$(FIRMWARE_TYPE).bin
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PSPNVRAM_POS=$(call int-add,$(HUDSON_PSP_DIRECTORY_POSITION) 0x64000) #$(shell printf %u 0xFFbf0000)
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PSPNVRAM_SIZE=$(call file-size,$(CONFIG_PSPNVRAM_FILE))
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cbfs-files-y += hudson/pspnvram
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hudson/pspnvram-file := $(CONFIG_PSPNVRAM_FILE)
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hudson/pspnvram-position := $(PSPNVRAM_POS)
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hudson/pspnvram-type := raw
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ifeq ($(CONFIG_HVB), HVB)
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# 6
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RTM_FILE=$(objcbfs)/bootblock.bin #The file size need to be 256 bytes aligned.
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RTM_SIZE=$(call file-size,$(RTM_FILE))
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RTM_POS=$(call int-add,4294967296 -$(RTM_SIZE))
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# 7
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RTMSIGN_FILE=$(obj)/bootblock_sig.bin
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RTMSIGN_POS=$(call int-add,$(HUDSON_PSP_DIRECTORY_POSITION) 0x800) #$(shell printf %u 0xFFb00800)
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RTMSIGN_SIZE=256 #it should be hardcoded to 256, otherwise circular dependency comes up.$(call file-size,$(RTMSIGN_FILE))
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cbfs-files-y += hudson/rtmsign
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hudson/rtmsign-file := $(RTMSIGN_FILE)
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hudson/rtmsign-position := $(RTMSIGN_POS)
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hudson/rtmsign-type := raw
|
|
||||||
endif
|
|
||||||
|
|
||||||
CONFIG_SMUSCS_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuScs$(FIRMWARE_TYPE).bin
|
|
||||||
SMUSCS_POS=$(call int-add,$(HUDSON_PSP_DIRECTORY_POSITION) 0x6d000) #$(shell printf %u 0xFFC00000)
|
|
||||||
SMUSCS_SIZE=$(call file-size,$(CONFIG_SMUSCS_FILE))
|
|
||||||
cbfs-files-y += hudson/smuscs
|
|
||||||
hudson/smuscs-file := $(CONFIG_SMUSCS_FILE)
|
|
||||||
hudson/smuscs-position := $(SMUSCS_POS)
|
|
||||||
hudson/smuscs-type := raw
|
|
||||||
|
|
||||||
define output_hex
|
|
||||||
echo $(1) | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'
|
|
||||||
endef
|
|
||||||
|
|
||||||
$(obj)/coreboot_psp_directory.bin: $(obj)/config.h $(FLETCHER) $(RTM_FILE)
|
|
||||||
echo " PSPDir $@"
|
|
||||||
for fwm in 0 $(AMDPUBKEY_SIZE) $(AMDPUBKEY_POS) 0; do \
|
|
||||||
echo $$fwm | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'; \
|
|
||||||
done > $@_tail.tmp
|
|
||||||
for fwm in 1 $(PSPBTLDR_SIZE) $(PSPBTLDR_POS) 0; do \
|
|
||||||
echo $$fwm | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'; \
|
|
||||||
done >> $@_tail.tmp
|
|
||||||
for fwm in 8 $(SMUFWM_SIZE) $(SMUFWM_POS) 0; do \
|
|
||||||
echo $$fwm | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'; \
|
|
||||||
done >> $@_tail.tmp
|
|
||||||
for fwm in 3 $(PSPRCVR_SIZE) $(PSPRCVR_POS) 0; do \
|
|
||||||
echo $$fwm | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'; \
|
|
||||||
done >> $@_tail.tmp
|
|
||||||
for fwm in 5 $(PUBSIGNEDKEY_SIZE) $(PUBSIGNEDKEY_POS) 0; do \
|
|
||||||
echo $$fwm | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'; \
|
|
||||||
done >> $@_tail.tmp
|
|
||||||
ifeq ($(CONFIG_HVB), HVB)
|
|
||||||
for fwm in 6 $(RTM_SIZE) $(RTM_POS) 0; do \
|
|
||||||
echo $$fwm | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'; \
|
|
||||||
done >> $@_tail.tmp
|
|
||||||
for fwm in 7 $(RTMSIGN_SIZE) $(RTMSIGN_POS) 0; do \
|
|
||||||
echo $$fwm | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'; \
|
|
||||||
done >> $@_tail.tmp
|
|
||||||
endif
|
|
||||||
for fwm in 2 $(PSPSECUREOS_SIZE) $(PSPSECUREOS_POS) 0; do \
|
|
||||||
echo $$fwm | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'; \
|
|
||||||
done >> $@_tail.tmp
|
|
||||||
for fwm in 4 $(PSPNVRAM_SIZE) $(PSPNVRAM_POS) 0; do \
|
|
||||||
echo $$fwm | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'; \
|
|
||||||
done >> $@_tail.tmp
|
|
||||||
for fwm in 95 $(SMUSCS_SIZE) $(SMUSCS_POS) 0; do \
|
|
||||||
echo $$fwm | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'; \
|
|
||||||
done >> $@_tail.tmp
|
|
||||||
for fwm in 11 4294967295 0 0; do \
|
|
||||||
echo $$fwm | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'; \
|
|
||||||
done >> $@_tail.tmp
|
|
||||||
for fwm in 1347637284 0 `ls -l $@_tail.tmp | awk '{printf("%d", $$5/16);}'` 0; do \
|
|
||||||
echo $$fwm | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'; \
|
|
||||||
done > $@_head.tmp
|
|
||||||
cat $@_head.tmp $@_tail.tmp > $@.tmp
|
|
||||||
$(FLETCHER) < $@.tmp > $@
|
|
||||||
rm $@_head.tmp $@_tail.tmp $@.tmp
|
|
||||||
|
|
||||||
$(obj)/coreboot_psp_directory_combine_pubkey.bin: $(obj)/coreboot_psp_directory.bin
|
|
||||||
cat $(obj)/coreboot_psp_directory.bin > $@
|
|
||||||
ls -l $(obj)/coreboot_psp_directory.bin | LC_ALL=C awk '{for (i=0; i<256-$$5; i++) {printf "%c", 255}}' >> $@
|
|
||||||
cat $(top)/$(FIRMWARE_LOCATE)/AmdPubKey$(FIRMWARE_TYPE).bin >> $@
|
|
||||||
|
|
||||||
cbfs-files-y += hudson/pspdir
|
|
||||||
hudson/pspdir-file := $(obj)/coreboot_psp_directory_combine_pubkey.bin
|
|
||||||
hudson/pspdir-position := $(HUDSON_PSP_DIRECTORY_POSITION)
|
|
||||||
hudson/pspdir-type := raw
|
|
||||||
|
|
||||||
endif
|
|
||||||
|
|
|
@ -66,7 +66,7 @@ Device(SDCN) {
|
||||||
Name(_ADR, 0x00140007)
|
Name(_ADR, 0x00140007)
|
||||||
} /* end SDCN */
|
} /* end SDCN */
|
||||||
|
|
||||||
#if !CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE && !CONFIG_SOUTHBRIDGE_AMD_AGESA_AVALON
|
#if !CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE
|
||||||
|
|
||||||
/* 0:14.4 - PCI slot 1, 2, 3 */
|
/* 0:14.4 - PCI slot 1, 2, 3 */
|
||||||
Device(PIBR) {
|
Device(PIBR) {
|
||||||
|
|
|
@ -29,8 +29,6 @@
|
||||||
#define FCH_INT_TABLE_SIZE 0x54
|
#define FCH_INT_TABLE_SIZE 0x54
|
||||||
#elif IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE)
|
#elif IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE)
|
||||||
#define FCH_INT_TABLE_SIZE 0x42
|
#define FCH_INT_TABLE_SIZE 0x42
|
||||||
#elif IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_AVALON)
|
|
||||||
#define FCH_INT_TABLE_SIZE 0x63
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#define PIRQ_NC 0x1F /* Not Used */
|
#define PIRQ_NC 0x1F /* Not Used */
|
||||||
|
@ -75,10 +73,6 @@
|
||||||
#define PIRQ_OHCI4 0x36 /* USB OHCI 14h.5 */
|
#define PIRQ_OHCI4 0x36 /* USB OHCI 14h.5 */
|
||||||
#define PIRQ_IDE 0x40 /* IDE 14h.1 */
|
#define PIRQ_IDE 0x40 /* IDE 14h.1 */
|
||||||
#define PIRQ_SATA 0x41 /* SATA 11h.0 */
|
#define PIRQ_SATA 0x41 /* SATA 11h.0 */
|
||||||
#if IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_AVALON)
|
|
||||||
#define PIRQ_SD 0x17 /* SD */
|
|
||||||
#define PIRQ_GPIO 0x62 /* GPIO Controller Interrupt */
|
|
||||||
#endif
|
|
||||||
#if IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_HUDSON)
|
#if IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_HUDSON)
|
||||||
#define PIRQ_SD 0x42 /* SD 14h.7 */
|
#define PIRQ_SD 0x42 /* SD 14h.7 */
|
||||||
#define PIRQ_GPP0 0x50 /* GPP INT 0 */
|
#define PIRQ_GPP0 0x50 /* GPP INT 0 */
|
||||||
|
|
|
@ -39,16 +39,6 @@ const char * intr_types[] = {
|
||||||
[0x30] = "Dev18.0 INTA", "Dev18.2 INTB", "Dev19.0 INTA", "Dev19.2 INTB", "Dev22.0 INTA", "Dev22.2 INTB",
|
[0x30] = "Dev18.0 INTA", "Dev18.2 INTB", "Dev19.0 INTA", "Dev19.2 INTB", "Dev22.0 INTA", "Dev22.2 INTB",
|
||||||
[0x40] = "RSVD\t", "SATA\t",
|
[0x40] = "RSVD\t", "SATA\t",
|
||||||
};
|
};
|
||||||
#elif IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_AVALON)
|
|
||||||
const char * intr_types[] = {
|
|
||||||
[0x00] = "INTA#\t", "INTB#\t", "INTC#\t", "INTD#\t", "INTE#\t", "INTF#\t", "INTG#\t", "INTH#\t",
|
|
||||||
[0x08] = "Misc\t", "Misc0\t", "Misc1\t", "Misc2\t", "Ser IRQ INTA", "Ser IRQ INTB", "Ser IRQ INTC", "Ser IRQ INTD",
|
|
||||||
[0x10] = "SCI\t", "SMBUS0\t", "ASF\t", "HDA\t", "FC\t\t", "GEC\t", "PerMon\t", "SD\t",
|
|
||||||
[0x20] = "IMC INT0\t", "IMC INT1\t", "IMC INT2\t", "IMC INT3\t", "IMC INT4\t", "IMC INT5\t",
|
|
||||||
[0x30] = "Dev18.0 INTA", "Dev18.2 INTB", "Dev19.0 INTA", "Dev19.2 INTB", "Dev22.0 INTA", "Dev22.2 INTB",
|
|
||||||
[0x40] = "RSVD\t", "SATA\t",
|
|
||||||
[0x60] = "RSVD\t", "RSVD\t", "GPIO\t",
|
|
||||||
};
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#endif /* AMD_PCI_INT_TYPES_H */
|
#endif /* AMD_PCI_INT_TYPES_H */
|
||||||
|
|
Loading…
Reference in New Issue