diff --git a/src/arch/riscv/include/arch/exception.h b/src/arch/riscv/include/arch/exception.h
index 28b9279707..fc57b3b55c 100644
--- a/src/arch/riscv/include/arch/exception.h
+++ b/src/arch/riscv/include/arch/exception.h
@@ -55,7 +55,7 @@ static inline void exception_init(void)
 
 void trap_handler(trapframe* tf);
 void handle_supervisor_call(trapframe* tf);
-void handleMisalignedLoad(trapframe *tf);
+void handle_misaligned_load(trapframe *tf);
 void handle_misaligned_store(trapframe *tf);
 
 #endif
diff --git a/src/arch/riscv/trap_handler.c b/src/arch/riscv/trap_handler.c
index 5b4d0b1801..193be61bdd 100644
--- a/src/arch/riscv/trap_handler.c
+++ b/src/arch/riscv/trap_handler.c
@@ -118,7 +118,7 @@ void trap_handler(trapframe *tf) {
 			break;
 		case 4:
 			printk(BIOS_DEBUG, "Trap: Load address misaligned\n");
-			//handleMisalignedLoad(tf);
+			handle_misaligned_load(tf);
 			break;
 		case 5:
 			printk(BIOS_DEBUG, "Trap: Load access fault\n");
@@ -161,7 +161,7 @@ void trap_handler(trapframe *tf) {
 	while(1);
 }
 
-void handleMisalignedLoad(trapframe *tf) {
+void handle_misaligned_load(trapframe *tf) {
 	printk(BIOS_DEBUG, "Trapframe ptr: %p\n", tf);
 	printk(BIOS_DEBUG, "Stored sp: %p\n", (void*) tf->gpr[2]);
 	insn_t faultingInstruction = 0;