haswell NRI: Collect SPD info
Collect SPD data from DIMMs and memory-down, and find the common supported settings. Original-Change-Id: I4e6a1408a638a463ecae37a447cfed1d6556e44a Original-Signed-off-by: Angel Pons <th3fanbus@gmail.com> Signed-off-by: Bill XIE <persmule@hardenedlinux.org> Change-Id: I7948554eb02113bdca380222a11cfb322f9615f8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/77049 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
This commit is contained in:
Angel Pons
Felix Held
parent
abaa4b5a96
commit
1b25422215
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@ -2,3 +2,4 @@
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romstage-y += raminit_main.c
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romstage-y += raminit_native.c
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romstage-y += spd_bitmunching.c
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@ -20,6 +20,7 @@ struct task_entry {
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};
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static const struct task_entry cold_boot[] = {
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{ collect_spd_info, true, "PROCSPD", },
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};
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/* Return a generic stepping value to make stepping checks simpler */
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@ -3,6 +3,15 @@
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#ifndef HASWELL_RAMINIT_NATIVE_H
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#define HASWELL_RAMINIT_NATIVE_H
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#include <device/dram/ddr3.h>
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#include <northbridge/intel/haswell/haswell.h>
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#define SPD_LEN 256
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/* 8 data lanes + 1 ECC lane */
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#define NUM_LANES 9
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#define NUM_LANES_NO_ECC 8
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enum raminit_boot_mode {
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BOOTMODE_COLD,
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BOOTMODE_WARM,
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@ -12,6 +21,8 @@ enum raminit_boot_mode {
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enum raminit_status {
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RAMINIT_STATUS_SUCCESS = 0,
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RAMINIT_STATUS_NO_MEMORY_INSTALLED,
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RAMINIT_STATUS_UNSUPPORTED_MEMORY,
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RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/
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};
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@ -21,14 +32,60 @@ enum generic_stepping {
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STEPPING_C0 = 3,
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};
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struct raminit_dimm_info {
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spd_raw_data raw_spd;
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struct dimm_attr_ddr3_st data;
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uint8_t spd_addr;
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bool valid;
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};
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struct sysinfo {
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enum raminit_boot_mode bootmode;
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enum generic_stepping stepping;
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uint32_t cpu; /* CPUID value */
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bool dq_pins_interleaved;
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/** TODO: ECC support untested **/
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bool is_ecc;
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/**
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* FIXME: LPDDR support is incomplete. The largest chunks are missing,
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* but some LPDDR-specific variations in algorithms have been handled.
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* LPDDR-specific functions have stubs which will halt upon execution.
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*/
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bool lpddr;
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struct raminit_dimm_info dimms[NUM_CHANNELS][NUM_SLOTS];
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union dimm_flags_ddr3_st flags;
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uint16_t cas_supported;
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/* Except for tCK, everything is eventually stored in DCLKs */
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uint32_t tCK;
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uint32_t tAA; /* Also known as tCL */
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uint32_t tWR;
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uint32_t tRCD;
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uint32_t tRRD;
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uint32_t tRP;
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uint32_t tRAS;
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uint32_t tRC;
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uint32_t tRFC;
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uint32_t tWTR;
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uint32_t tRTP;
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uint32_t tFAW;
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uint32_t tCWL;
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uint32_t tCMD;
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uint8_t lanes; /* 8 or 9 */
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uint8_t chanmap;
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uint8_t dpc[NUM_CHANNELS]; /* DIMMs per channel */
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uint8_t rankmap[NUM_CHANNELS];
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uint8_t rank_mirrored[NUM_CHANNELS];
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uint32_t channel_size_mb[NUM_CHANNELS];
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};
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void raminit_main(enum raminit_boot_mode bootmode);
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enum raminit_status collect_spd_info(struct sysinfo *ctrl);
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#endif
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@ -0,0 +1,206 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <cbfs.h>
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#include <commonlib/bsd/clamp.h>
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#include <console/console.h>
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#include <device/dram/ddr3.h>
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#include <device/smbus_host.h>
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#include <northbridge/intel/haswell/haswell.h>
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#include <northbridge/intel/haswell/raminit.h>
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#include <string.h>
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#include <types.h>
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#include "raminit_native.h"
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static const uint8_t *get_spd_data_from_cbfs(struct spd_info *spdi)
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{
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if (!CONFIG(HAVE_SPD_IN_CBFS))
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return NULL;
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printk(RAM_DEBUG, "SPD index %u\n", spdi->spd_index);
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size_t spd_file_len;
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uint8_t *spd_file = cbfs_map("spd.bin", &spd_file_len);
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if (!spd_file) {
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printk(BIOS_ERR, "SPD data not found in CBFS\n");
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return NULL;
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}
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if (spd_file_len < ((spdi->spd_index + 1) * SPD_LEN)) {
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printk(BIOS_ERR, "SPD index override to 0 - old hardware?\n");
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spdi->spd_index = 0;
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}
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if (spd_file_len < SPD_LEN) {
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printk(BIOS_ERR, "Invalid SPD data in CBFS\n");
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return NULL;
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}
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return spd_file + (spdi->spd_index * SPD_LEN);
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}
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static void get_spd_for_dimm(struct raminit_dimm_info *const dimm, const uint8_t *cbfs_spd)
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{
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if (dimm->spd_addr == SPD_MEMORY_DOWN) {
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if (cbfs_spd) {
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memcpy(dimm->raw_spd, cbfs_spd, SPD_LEN);
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dimm->valid = true;
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printk(RAM_DEBUG, "memory-down\n");
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return;
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} else {
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printk(RAM_DEBUG, "memory-down but no CBFS SPD data, ignoring\n");
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return;
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}
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}
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printk(RAM_DEBUG, "slotted ");
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const uint8_t spd_mem_type = smbus_read_byte(dimm->spd_addr, SPD_MEMORY_TYPE);
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if (spd_mem_type != SPD_MEMORY_TYPE_SDRAM_DDR3) {
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printk(RAM_DEBUG, "and not DDR3, ignoring\n");
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return;
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}
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printk(RAM_DEBUG, "and DDR3\n");
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if (i2c_eeprom_read(dimm->spd_addr, 0, SPD_LEN, dimm->raw_spd) != SPD_LEN) {
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printk(BIOS_WARNING, "I2C block read failed, trying SMBus byte reads\n");
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for (uint32_t i = 0; i < SPD_LEN; i++)
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dimm->raw_spd[i] = smbus_read_byte(dimm->spd_addr, i);
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}
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dimm->valid = true;
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}
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static void get_spd_data(struct sysinfo *ctrl)
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{
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struct spd_info spdi = {0};
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mb_get_spd_map(&spdi);
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const uint8_t *cbfs_spd = get_spd_data_from_cbfs(&spdi);
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for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
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for (uint8_t slot = 0; slot < NUM_SLOTS; slot++) {
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struct raminit_dimm_info *const dimm = &ctrl->dimms[channel][slot];
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dimm->spd_addr = spdi.addresses[NUM_SLOTS * channel + slot];
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if (!dimm->spd_addr)
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continue;
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printk(RAM_DEBUG, "CH%uS%u is ", channel, slot);
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get_spd_for_dimm(dimm, cbfs_spd);
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}
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}
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}
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static void decode_spd(struct raminit_dimm_info *const dimm)
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{
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/** TODO: Hook up somewhere, and handle lack of XMP data **/
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const bool enable_xmp = false;
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memset(&dimm->data, 0, sizeof(dimm->data));
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if (enable_xmp)
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spd_xmp_decode_ddr3(&dimm->data, dimm->raw_spd, DDR3_XMP_PROFILE_1);
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else
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spd_decode_ddr3(&dimm->data, dimm->raw_spd);
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if (CONFIG(DEBUG_RAM_SETUP))
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dram_print_spd_ddr3(&dimm->data);
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}
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static enum raminit_status find_common_spd_parameters(struct sysinfo *ctrl)
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{
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ctrl->cas_supported = 0xffff;
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ctrl->flags.raw = 0xffffffff;
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ctrl->tCK = 0;
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ctrl->tAA = 0;
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ctrl->tWR = 0;
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ctrl->tRCD = 0;
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ctrl->tRRD = 0;
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ctrl->tRP = 0;
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ctrl->tRAS = 0;
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ctrl->tRC = 0;
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ctrl->tRFC = 0;
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ctrl->tWTR = 0;
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ctrl->tRTP = 0;
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ctrl->tFAW = 0;
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ctrl->tCWL = 0;
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ctrl->tCMD = 0;
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ctrl->chanmap = 0;
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bool yes_ecc = false;
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bool not_ecc = false;
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for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
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ctrl->dpc[channel] = 0;
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ctrl->rankmap[channel] = 0;
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ctrl->rank_mirrored[channel] = 0;
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ctrl->channel_size_mb[channel] = 0;
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for (uint8_t slot = 0; slot < NUM_SLOTS; slot++) {
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struct raminit_dimm_info *const dimm = &ctrl->dimms[channel][slot];
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if (!dimm->valid)
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continue;
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printk(RAM_DEBUG, "\nCH%uS%u SPD:\n", channel, slot);
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decode_spd(dimm);
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ctrl->chanmap |= BIT(channel);
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ctrl->dpc[channel]++;
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ctrl->channel_size_mb[channel] += dimm->data.size_mb;
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/* The first rank of a populated slot is always present */
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const uint8_t rank = slot + slot;
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assert(dimm->data.ranks);
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ctrl->rankmap[channel] |= (BIT(dimm->data.ranks) - 1) << rank;
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if (dimm->data.flags.pins_mirrored)
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ctrl->rank_mirrored[channel] |= BIT(rank + 1);
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/* Find common settings */
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ctrl->cas_supported &= dimm->data.cas_supported;
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ctrl->flags.raw &= dimm->data.flags.raw;
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ctrl->tCK = MAX(ctrl->tCK, dimm->data.tCK);
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ctrl->tAA = MAX(ctrl->tAA, dimm->data.tAA);
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ctrl->tWR = MAX(ctrl->tWR, dimm->data.tWR);
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ctrl->tRCD = MAX(ctrl->tRCD, dimm->data.tRCD);
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ctrl->tRRD = MAX(ctrl->tRRD, dimm->data.tRRD);
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ctrl->tRP = MAX(ctrl->tRP, dimm->data.tRP);
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ctrl->tRAS = MAX(ctrl->tRAS, dimm->data.tRAS);
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ctrl->tRC = MAX(ctrl->tRC, dimm->data.tRC);
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ctrl->tRFC = MAX(ctrl->tRFC, dimm->data.tRFC);
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ctrl->tWTR = MAX(ctrl->tWTR, dimm->data.tWTR);
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ctrl->tRTP = MAX(ctrl->tRTP, dimm->data.tRTP);
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ctrl->tFAW = MAX(ctrl->tFAW, dimm->data.tFAW);
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ctrl->tCWL = MAX(ctrl->tCWL, dimm->data.tCWL);
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ctrl->tCMD = MAX(ctrl->tCMD, dimm->data.tCMD);
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yes_ecc |= dimm->data.flags.is_ecc;
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not_ecc |= !dimm->data.flags.is_ecc;
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}
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}
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if (!ctrl->chanmap) {
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printk(BIOS_ERR, "No DIMMs were found\n");
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return RAMINIT_STATUS_NO_MEMORY_INSTALLED;
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}
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if (!ctrl->cas_supported) {
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printk(BIOS_ERR, "Could not resolve common CAS latency\n");
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return RAMINIT_STATUS_UNSUPPORTED_MEMORY;
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}
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/** TODO: Properly handle ECC support and ECC forced **/
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if (yes_ecc && not_ecc) {
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/** TODO: Test if the ECC DIMMs can be operated as non-ECC DIMMs **/
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printk(BIOS_ERR, "Both ECC and non-ECC DIMMs present, this is unsupported\n");
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return RAMINIT_STATUS_UNSUPPORTED_MEMORY;
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}
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if (yes_ecc)
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ctrl->lanes = NUM_LANES;
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else
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ctrl->lanes = NUM_LANES_NO_ECC;
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ctrl->is_ecc = yes_ecc;
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/** TODO: Complete LPDDR support **/
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ctrl->lpddr = false;
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return RAMINIT_STATUS_SUCCESS;
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}
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enum raminit_status collect_spd_info(struct sysinfo *ctrl)
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{
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get_spd_data(ctrl);
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return find_common_spd_parameters(ctrl);
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}
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