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cezanne/psp_verstage: populate a/b firmware 

Build amdfw_[ab] and put them into CBFS. We can reuse FW_[AB] position
from zork since we have same flash layout and size.

Signed-off-by: Kangheui Won <khwon@chromium.org>
Change-Id: Idb31afa7a513f01593b2af75515a170dfca8d360
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52961
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kangheui Won 2021-05-06 13:09:12 +10:00 committed by Martin Roth
parent f6b2a1ca92
commit 1b2eeb13a0
2 changed files with 63 additions and 0 deletions
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18
src/soc/amd/cezanne/Kconfig
View File

@ -416,4 +416,22 @@ config CMOS_RECOVERY_BYTE
This is the byte before the default first byte used by VBNV
(0x26 + 0x0E - 1)
if VBOOT_SLOTS_RW_AB && VBOOT_STARTS_BEFORE_BOOTBLOCK
config RWA_REGION_ONLY
string
default "apu/amdfw_a"
help
Add a space-delimited list of filenames that should only be in the
RW-A section.
config RWB_REGION_ONLY
string
default "apu/amdfw_b"
help
Add a space-delimited list of filenames that should only be in the
RW-B section.
endif # VBOOT_SLOTS_RW_AB && VBOOT_STARTS_BEFORE_BOOTBLOCK
endif # SOC_AMD_CEZANNE

45
src/soc/amd/cezanne/Makefile.inc
View File

@ -73,6 +73,14 @@ CEZANNE_FWM_POSITION=$(call int-add, \
$(call int-subtract, 0xffffffff \
$(call int-shift-left, \
0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000 1)
CEZANNE_FW_A_POSITION=$(call int-add, \
$(shell awk '$$2 == "FMAP_SECTION_FW_MAIN_A_START" {print $$3}' $(obj)/fmap_config.h) \
0x40)
CEZANNE_FW_B_POSITION=$(call int-add, \
$(shell awk '$$2 == "FMAP_SECTION_FW_MAIN_B_START" {print $$3}' $(obj)/fmap_config.h) \
0x40)
#
# PSP Directory Table items
#
@ -234,11 +242,48 @@ $(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS)
$(AMDCOMPRESS) --infile $(PSP_ELF_FILE) --outfile $@ --compress \
--maxsize $(PSP_BIOSBIN_SIZE)
$(obj)/amdfw_a.rom: $(obj)/amdfw.rom
rm -f $@
@printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
$(AMDFWTOOL) \
$(AMDFW_COMMON_ARGS) \
$(OPT_APOB_NV_SIZE) \
$(OPT_APOB_NV_BASE) \
--location $(shell printf "%#x" $(CEZANNE_FW_A_POSITION)) \
--anywhere \
--multilevel \
--output $@
$(obj)/amdfw_b.rom: $(obj)/amdfw.rom
rm -f $@
@printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
$(AMDFWTOOL) \
$(AMDFW_COMMON_ARGS) \
$(OPT_APOB_NV_SIZE) \
$(OPT_APOB_NV_BASE) \
--location $(shell printf "%#x" $(CEZANNE_FW_B_POSITION)) \
--anywhere \
--multilevel \
--output $@
cbfs-files-y += apu/amdfw
apu/amdfw-file := $(obj)/amdfw.rom
apu/amdfw-position := $(CEZANNE_FWM_POSITION)
apu/amdfw-type := raw
ifeq ($(CONFIG_VBOOT_SLOTS_RW_AB)$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),yy)
cbfs-files-y += apu/amdfw_a
apu/amdfw_a-file := $(obj)/amdfw_a.rom
apu/amdfw_a-position := $(call strip_quotes, $(CEZANNE_FW_A_POSITION))
apu/amdfw_a-type := raw
cbfs-files-y += apu/amdfw_b
apu/amdfw_b-file := $(obj)/amdfw_b.rom
apu/amdfw_b-position := $(call strip_quotes, $(CEZANNE_FW_B_POSITION))
apu/amdfw_b-type := raw
endif
cpu_microcode_bins += $(wildcard ${FIRMWARE_LOCATION}/UcodePatch_*.bin)
endif # ($(CONFIG_SOC_AMD_CEZANNE),y)