cezanne/psp_verstage: populate a/b firmware
Build amdfw_[ab] and put them into CBFS. We can reuse FW_[AB] position from zork since we have same flash layout and size. Signed-off-by: Kangheui Won <khwon@chromium.org> Change-Id: Idb31afa7a513f01593b2af75515a170dfca8d360 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52961 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -416,4 +416,22 @@ config CMOS_RECOVERY_BYTE
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This is the byte before the default first byte used by VBNV
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This is the byte before the default first byte used by VBNV
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(0x26 + 0x0E - 1)
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(0x26 + 0x0E - 1)
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if VBOOT_SLOTS_RW_AB && VBOOT_STARTS_BEFORE_BOOTBLOCK
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config RWA_REGION_ONLY
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string
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default "apu/amdfw_a"
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help
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Add a space-delimited list of filenames that should only be in the
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RW-A section.
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config RWB_REGION_ONLY
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string
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default "apu/amdfw_b"
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help
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Add a space-delimited list of filenames that should only be in the
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RW-B section.
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endif # VBOOT_SLOTS_RW_AB && VBOOT_STARTS_BEFORE_BOOTBLOCK
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endif # SOC_AMD_CEZANNE
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endif # SOC_AMD_CEZANNE
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@ -73,6 +73,14 @@ CEZANNE_FWM_POSITION=$(call int-add, \
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$(call int-subtract, 0xffffffff \
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$(call int-subtract, 0xffffffff \
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$(call int-shift-left, \
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$(call int-shift-left, \
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0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000 1)
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0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000 1)
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CEZANNE_FW_A_POSITION=$(call int-add, \
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$(shell awk '$$2 == "FMAP_SECTION_FW_MAIN_A_START" {print $$3}' $(obj)/fmap_config.h) \
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0x40)
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CEZANNE_FW_B_POSITION=$(call int-add, \
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$(shell awk '$$2 == "FMAP_SECTION_FW_MAIN_B_START" {print $$3}' $(obj)/fmap_config.h) \
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0x40)
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#
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#
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# PSP Directory Table items
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# PSP Directory Table items
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#
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#
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@ -234,11 +242,48 @@ $(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS)
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$(AMDCOMPRESS) --infile $(PSP_ELF_FILE) --outfile $@ --compress \
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$(AMDCOMPRESS) --infile $(PSP_ELF_FILE) --outfile $@ --compress \
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--maxsize $(PSP_BIOSBIN_SIZE)
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--maxsize $(PSP_BIOSBIN_SIZE)
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$(obj)/amdfw_a.rom: $(obj)/amdfw.rom
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rm -f $@
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@printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
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$(AMDFWTOOL) \
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$(AMDFW_COMMON_ARGS) \
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$(OPT_APOB_NV_SIZE) \
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$(OPT_APOB_NV_BASE) \
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--location $(shell printf "%#x" $(CEZANNE_FW_A_POSITION)) \
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--anywhere \
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--multilevel \
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--output $@
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$(obj)/amdfw_b.rom: $(obj)/amdfw.rom
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rm -f $@
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@printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
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$(AMDFWTOOL) \
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$(AMDFW_COMMON_ARGS) \
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$(OPT_APOB_NV_SIZE) \
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$(OPT_APOB_NV_BASE) \
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--location $(shell printf "%#x" $(CEZANNE_FW_B_POSITION)) \
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--anywhere \
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--multilevel \
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--output $@
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cbfs-files-y += apu/amdfw
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cbfs-files-y += apu/amdfw
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apu/amdfw-file := $(obj)/amdfw.rom
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apu/amdfw-file := $(obj)/amdfw.rom
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apu/amdfw-position := $(CEZANNE_FWM_POSITION)
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apu/amdfw-position := $(CEZANNE_FWM_POSITION)
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apu/amdfw-type := raw
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apu/amdfw-type := raw
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ifeq ($(CONFIG_VBOOT_SLOTS_RW_AB)$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),yy)
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cbfs-files-y += apu/amdfw_a
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apu/amdfw_a-file := $(obj)/amdfw_a.rom
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apu/amdfw_a-position := $(call strip_quotes, $(CEZANNE_FW_A_POSITION))
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apu/amdfw_a-type := raw
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cbfs-files-y += apu/amdfw_b
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apu/amdfw_b-file := $(obj)/amdfw_b.rom
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apu/amdfw_b-position := $(call strip_quotes, $(CEZANNE_FW_B_POSITION))
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apu/amdfw_b-type := raw
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endif
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cpu_microcode_bins += $(wildcard ${FIRMWARE_LOCATION}/UcodePatch_*.bin)
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cpu_microcode_bins += $(wildcard ${FIRMWARE_LOCATION}/UcodePatch_*.bin)
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endif # ($(CONFIG_SOC_AMD_CEZANNE),y)
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endif # ($(CONFIG_SOC_AMD_CEZANNE),y)
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