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superio/ite/it8772f: Move towards removing #include .c 

Move samsung/stumpy board towards generic romstage component and away
from poorly written hard-coded model specific Super I/O component. This
is an incremental step towards getting obj-level abstraction between
board and Super I/O.

Change-Id: I358c5abef85c2ffa1b7178025cde8834a35b0a51
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5899
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Edward O'Callaghan 2014-06-01 18:04:05 +10:00 committed by Kyösti Mälkki
parent d235da108b
commit 1b3acb13e4
3 changed files with 15 additions and 28 deletions
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12
src/mainboard/samsung/stumpy/romstage.c
View File

@ -31,7 +31,9 @@
#include <cbmem.h> #include <cbmem.h>
#include <console/console.h> #include <console/console.h>
#include <bootmode.h> #include <bootmode.h>
#include "superio/ite/it8772f/it8772f.h" #include <superio/ite/common/ite.h>
#include <superio/ite/it8772f/it8772f.h>
/* FIXME: SUPERIO include.c */
#include "superio/ite/it8772f/early_serial.c" #include "superio/ite/it8772f/early_serial.c"
#include "northbridge/intel/sandybridge/sandybridge.h" #include "northbridge/intel/sandybridge/sandybridge.h"
#include "northbridge/intel/sandybridge/raminit.h" #include "northbridge/intel/sandybridge/raminit.h"
@ -58,6 +60,9 @@
#endif #endif
#define USB_RESET_DISABLE_MAGIC (0xdd) /* Disable if set to this */ #define USB_RESET_DISABLE_MAGIC (0xdd) /* Disable if set to this */
#define SERIAL_DEV PNP_DEV(0x2e, IT8772F_SP1)
#define GPIO_DEV PNP_DEV(0x2e, IT8772F_GPIO)
static void pch_enable_lpc(void) static void pch_enable_lpc(void)
{ {
/* Set COM1/COM2 decode range */ /* Set COM1/COM2 decode range */
@ -233,10 +238,9 @@ void main(unsigned long bist)
setup_sio_gpios(); setup_sio_gpios();
/* Early SuperIO setup */ /* Early SuperIO setup */
it8772f_kill_watchdog();
it8772f_ac_resume_southbridge(); it8772f_ac_resume_southbridge();
it8772f_enable_serial(PNP_DEV(IT8772F_BASE, IT8772F_SP1), ite_kill_watchdog(GPIO_DEV);
CONFIG_TTYS0_BASE); ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
console_init(); console_init();
init_bootmode_straps(); init_bootmode_straps();

21
src/superio/ite/it8772f/early_serial.c
View File

@ -22,6 +22,8 @@
#include <device/pnp_def.h> #include <device/pnp_def.h>
#include "it8772f.h" #include "it8772f.h"
/* NOTICE: This file is deprecated, use ite/common instead */
/* The base address is 0x2e or 0x4e, depending on config bytes. */ /* The base address is 0x2e or 0x4e, depending on config bytes. */
#define SIO_BASE IT8772F_BASE #define SIO_BASE IT8772F_BASE
#define SIO_INDEX SIO_BASE #define SIO_INDEX SIO_BASE
@ -85,25 +87,6 @@ void it8772f_enable_3vsbsw(void)
it8772f_exit_conf(); it8772f_exit_conf();
} }
void it8772f_kill_watchdog(void)
{
it8772f_enter_conf();
it8772f_sio_write(IT8772F_CONFIG_REG_LDN, IT8772F_GPIO);
it8772f_sio_write(IT8772F_CONFIG_REG_WATCHDOG, 0x00);
it8772f_exit_conf();
}
/* Enable the serial port(s). */
void it8772f_enable_serial(device_t dev, u16 iobase)
{
it8772f_enter_conf();
it8772f_sio_write(IT8772F_CONFIG_REG_LDN, dev & 0xff);
it8772f_sio_write(PNP_IDX_IO0, (iobase >> 8) & 0xff);
it8772f_sio_write(PNP_IDX_IO0+1, iobase & 0xff);
it8772f_sio_write(PNP_IDX_EN, 1);
it8772f_exit_conf();
}
/* Set AC resume to be up to the Southbridge */ /* Set AC resume to be up to the Southbridge */
void it8772f_ac_resume_southbridge(void) void it8772f_ac_resume_southbridge(void)
{ {

10
src/superio/ite/it8772f/it8772f.h
View File

@ -18,9 +18,10 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/ */
#ifndef SUPERIO_ITE_IT8772F_IT8772F_H #ifndef SUPERIO_ITE_IT8772F_H
#define SUPERIO_ITE_IT8772F_IT8772F_H #define SUPERIO_ITE_IT8772F_H
/* FIXME: SUPERIO include.c */
#define IT8772F_BASE 0x2e #define IT8772F_BASE 0x2e
#define IT8772F_FDC 0x00 /* Floppy disk controller */ #define IT8772F_FDC 0x00 /* Floppy disk controller */
@ -107,11 +108,10 @@
u8 it8772f_sio_read(u8 index); u8 it8772f_sio_read(u8 index);
void it8772f_sio_write(u8 index, u8 value); void it8772f_sio_write(u8 index, u8 value);
void it8772f_enable_serial(device_t dev, u16 iobase);
void it8772f_kill_watchdog(void);
void it8772f_24mhz_clkin(void); void it8772f_24mhz_clkin(void);
void it8772f_enable_3vsbsw(void); void it8772f_enable_3vsbsw(void);
void it8772f_ac_resume_southbridge(void); void it8772f_ac_resume_southbridge(void);
void it8772f_gpio_setup(int set, u8 func_select, u8 polarity, u8 pullup, void it8772f_gpio_setup(int set, u8 func_select, u8 polarity, u8 pullup,
u8 output, u8 enable); u8 output, u8 enable);
#endif
#endif /* SUPERIO_ITE_IT8772F_H */