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mb/google/nissa/var/uldren: Add DPTF parameters

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The DPTF parameters were verified by the thermal team.

BUG=b:282598257
BRANCH=firmware-nissa-15217.B
TEST=emerge-nissa coreboot chromeos-bootimage

Change-Id: I1f38ef52d3906960f8b692595fcc3b39bc000243
Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75413
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
This commit is contained in:
Dtrain Hsu 2023-05-24 16:11:44 +08:00 committed by Felix Held
parent d436b1626c
commit 1b3b098434
1 changed files with 49 additions and 0 deletions
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49
src/mainboard/google/brya/variants/uldren/overridetree.cb
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@ -159,6 +159,55 @@ chip soc/intel/alderlake
}"
device domain 0 on
device ref dtt on
chip drivers/intel/dptf
## sensor information
register "options.tsr[0].desc" = ""CPU_VR""
register "options.tsr[1].desc" = ""Charger""
register "options.tsr[2].desc" = ""Ambient""
## Passive Policy
register "policies.passive" = "{
[0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 85, 5000),
[2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 85, 5000),
[3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 85, 5000),
}"
## Critical Policy
register "policies.critical" = "{
[0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 98, SHUTDOWN),
[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 98, SHUTDOWN),
[3] = DPTF_CRITICAL(TEMP_SENSOR_2, 98, SHUTDOWN),
}"
register "controls.power_limits" = "{
.pl1 = {
.min_power = 3000,
.max_power = 6000,
.time_window_min = 28 * MSECS_PER_SEC,
.time_window_max = 28 * MSECS_PER_SEC,
.granularity = 250
},
.pl2 = {
.min_power = 25000,
.max_power = 25000,
.time_window_min = 28 * MSECS_PER_SEC,
.time_window_max = 28 * MSECS_PER_SEC,
.granularity = 1000
}
}"
## Charger Performance Control (Control, mA)
register "controls.charger_perf" = "{
[0] = { 255, 1700 },
[1] = { 24, 1500 },
[2] = { 16, 1000 },
[3] = { 8, 500 }
}"
device generic 0 on end
end
end
device ref cnvi_wifi on
chip drivers/wifi/generic
register "wake" = "GPE0_PME_B0"