mainboard/starlabs/labtop: Hook up Thunderbolt to CMOS

Hook up Thunderbolt and related settings to CMOS value of `thunderbolt`.
Changes TcssXhciEn, UsbTcPortEn and the relevant PCI devices.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Ibadc7464831242ae51982610b410ccf0a6811edd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59705
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Andy Pont <andy.pont@sdcsystems.com>
This commit is contained in:
Sean Rhodes 2021-11-28 08:34:53 +00:00 committed by Felix Held
parent 5e59f169ec
commit 1b66bbaf83
4 changed files with 22 additions and 0 deletions

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@ -14,6 +14,7 @@ webcam=Enable
microphone=Enable microphone=Enable
legacy_8254_timer=Enable legacy_8254_timer=Enable
usb_always_on=Disable usb_always_on=Disable
thunderbolt=Disable
# EC # EC
kbl_timeout=30 seconds kbl_timeout=30 seconds
fn_ctrl_swap=Disable fn_ctrl_swap=Disable

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@ -30,6 +30,7 @@ entries
520 1 e 1 microphone 520 1 e 1 microphone
528 1 e 1 legacy_8254_timer 528 1 e 1 legacy_8254_timer
536 1 e 1 usb_always_on 536 1 e 1 usb_always_on
544 1 e 1 thunderbolt
# coreboot config options: EC # coreboot config options: EC
600 3 e 4 kbl_timeout 600 3 e 4 kbl_timeout

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@ -19,6 +19,9 @@ void devtree_update(void)
&cfg->power_limits_config[POWER_LIMITS_U_4_CORE]; &cfg->power_limits_config[POWER_LIMITS_U_4_CORE];
struct device *nic_dev = pcidev_on_root(0x14, 3); struct device *nic_dev = pcidev_on_root(0x14, 3);
struct device *tbt_pci_dev = pcidev_on_root(0x07, 0);
struct device *tbt_dma_dev = pcidev_on_root(0x0d, 2);
/* Update PL1 & PL2 based on CMOS settings */ /* Update PL1 & PL2 based on CMOS settings */
switch (get_uint_option("power_profile", 0)) { switch (get_uint_option("power_profile", 0)) {
@ -50,4 +53,13 @@ void devtree_update(void)
/* Enable/Disable Webcam based on CMOS settings */ /* Enable/Disable Webcam based on CMOS settings */
if (get_uint_option("webcam", 1) == 0) if (get_uint_option("webcam", 1) == 0)
cfg->usb2_ports[3].enable = 0; cfg->usb2_ports[3].enable = 0;
/* Enable/Disable Thunderbolt based on CMOS settings */
if (get_uint_option("thunderbolt", 1) == 0) {
cfg->UsbTcPortEn = 0;
cfg->TcssXhciEn = 0;
cfg->TcssD3ColdDisable = 0;
tbt_pci_dev->enabled = 0;
tbt_dma_dev->enabled = 0;
}
} }

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@ -33,4 +33,12 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
const uint8_t ht = get_uint_option("hyper_threading", const uint8_t ht = get_uint_option("hyper_threading",
mupd->FspmConfig.HyperThreading); mupd->FspmConfig.HyperThreading);
mupd->FspmConfig.HyperThreading = ht; mupd->FspmConfig.HyperThreading = ht;
/* Enable/Disable Thunderbolt based on CMOS settings */
if (get_uint_option("thunderbolt", 1) == 0) {
mupd->FspmConfig.VtdItbtEnable = 0;
mupd->FspmConfig.VtdBaseAddress[3] = 0;
mupd->FspmConfig.TcssDma0En = 0;
mupd->FspmConfig.TcssItbtPcie0En = 0;
}
}; };