mb/intel/shadowmountain: Add flash layout

This patch adds the flash layout for shadowmountain.

BUG=b:175808146
TEST=util/abuild/abuild -p none -t intel/shadowmountain -a -c max

Signed-off-by: V Sowmya <v.sowmya@intel.com>
Change-Id: I7073d9c783684051e33e7a33eca50007d286bb00
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49478
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>

src/mainboard/intel/shadowmountain/chromeos.fmd

@@ -0,0 +1,43 @@
+FLASH@0xfe000000 0x2000000 {
+	SI_ALL@0x0 0x1000000 {
+		SI_DESC@0x0 0x1000
+		SI_ME@0x1000 0xfff000
+	}
+	SI_BIOS@0x1400000 0xc00000 {
+		RW_SECTION_A@0x0 0x368000 {
+			VBLOCK_A@0x0 0x10000
+			FW_MAIN_A(CBFS)@0x10000 0x357fc0
+			RW_FWID_A@0x367fc0 0x40
+		}
+		RW_SECTION_B@0x368000 0x368000 {
+			VBLOCK_B@0x0 0x10000
+			FW_MAIN_B(CBFS)@0x10000 0x357fc0
+			RW_FWID_B@0x367fc0 0x40
+		}
+		RW_MISC@0x6d0000 0x30000 {
+			UNIFIED_MRC_CACHE(PRESERVE)@0x0 0x20000 {
+				RECOVERY_MRC_CACHE@0x0 0x10000
+				RW_MRC_CACHE@0x10000 0x10000
+			}
+			RW_ELOG(PRESERVE)@0x20000 0x4000
+			RW_SHARED@0x24000 0x4000 {
+				SHARED_DATA@0x0 0x2000
+				VBLOCK_DEV@0x2000 0x2000
+			}
+			RW_VPD(PRESERVE)@0x28000 0x2000
+			RW_NVRAM(PRESERVE)@0x2a000 0x6000
+		}
+		# RW_LEGACY needs to be minimum of 1MB
+		RW_LEGACY(CBFS)@0x700000 0x100000
+		WP_RO@0x800000 0x400000 {
+			RO_VPD(PRESERVE)@0x0 0x4000
+			RO_SECTION@0x4000 0x3fc000 {
+				FMAP@0x0 0x800
+				RO_FRID@0x800 0x40
+				RO_FRID_PAD@0x840 0x7c0
+				GBB@0x1000 0x3000
+				COREBOOT(CBFS)@0x4000 0x3f8000
+			}
+		}
+	}
+}