soc/intel/apollolake: Avoid marking 0xe0000-0xfffff region usable
coreboot writes RDSP at 0xf0000. Since depthcharge wipes usable memory regions before starting, kernel can't find RDSP. Change-Id: I584bd5d24248cf38f46342615cf3b0252a821b2a Signed-off-by: Andrey Petrov <andrey.petrov@intel.com> Reviewed-on: https://review.coreboot.org/14466 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -109,8 +109,12 @@ static int mc_add_dram_resources(device_t dev, int index)
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/* 0 - > 0xa0000: 640kb of DOS memory. Not enough for anybody nowadays */
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ram_resource(dev, index++, 0, 640);
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/* 0xc0000 -> top_of_ram, skipping the legacy VGA region */
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base_k = 768;
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/* 0xa0000 - 0xbffff: legacy VGA */
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mmio_resource(dev, index++, 640, 128);
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/* 0xc0000 -> 0xfffff: leave without e820 entry, as it has special uses */
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/* 0x100000 -> top_of_ram */
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base_k = 1024;
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size_k = (tseg / KiB) - base_k;
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ram_resource(dev, index++, base_k, size_k);
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@ -128,8 +132,6 @@ static int mc_add_dram_resources(device_t dev, int index)
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size_k = (touud / KiB) - base_k;
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ram_resource(dev, index++, base_k, size_k);
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/* 0xa0000 - 0xbffff: legacy VGA */
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mmio_resource(dev, index++, 640, 128);
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return index;
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}
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