x86: provide common macro for linking early stages
In order to support verstage on x86 one needs to link verstage like romstage since it needs all the cache-as-ram goodies. Therefore, provide a macro that one can invoke that provides the necessary recipes for linking that particular stage in such an environment. BUG=chrome-os-partner:44827 BRANCH=None TEST=Built and booted glados. Change-Id: I12f4872df09fff6715829de68fc374e230350c2e Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11739 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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@ -115,27 +115,44 @@ endif
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endif # CONFIG_ARCH_BOOTBLOCK_X86_32 / CONFIG_ARCH_BOOTBLOCK_X86_64
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###############################################################################
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# romstage
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# common support for early assembly includes
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###############################################################################
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ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32)$(CONFIG_ARCH_ROMSTAGE_X86_64),y)
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romstage-y += memlayout.ld
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# Chipset specific assembly stubs in the romstage program flow. Certain
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# boards have more than one assembly stub so collect those and put them
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# into a single generated file.
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crt0s = $(cpu_incs-y)
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$(objgenerated)/romstage.inc: $$(crt0s)
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$(objgenerated)/assembly.inc: $$(crt0s)
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@printf " GEN $(subst $(obj)/,,$(@))\n"
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printf '$(foreach crt0,$(crt0s),#include "$(crt0)"\n)' > $@
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define early_x86_stage
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# $1 stage name
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# $2 oformat
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$(1)-y += memlayout.ld
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# Add the assembly file that pulls in the rest of the dependencies in
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# the right order. Make sure the auto generated romstage.inc is a proper
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# the right order. Make sure the auto generated assembly.inc is a proper
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# dependency.
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romstage-y += romstage.S
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$(obj)/arch/x86/romstage.romstage.o: $(objgenerated)/romstage.inc
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$(1)-y += assembly_entry.S
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$$(obj)/arch/x86/assembly_entry.$(1).o: $(objgenerated)/assembly.inc
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$$(objcbfs)/$(1).debug: $$$$($(1)-libs) $$$$($(1)-objs)
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@printf " LINK $$(subst $$(obj)/,,$$(@))\n"
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$$(LD_$(1)) $$(LDFLAGS_$(1)) -o $$@ -L$$(obj) $$(COMPILER_RT_FLAGS_$(1)) --whole-archive --start-group $$(filter-out %.ld,$$($(1)-objs)) $$($(1)-libs) --no-whole-archive $$(COMPILER_RT_$(1)) --end-group -T $$(obj)/arch/x86/memlayout.$(1).ld --oformat $(2)
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LANG=C LC_ALL= $$(OBJCOPY_$(1)) --only-section .illegal_globals $$(@) $$(objcbfs)/$(1)_null.offenders 2>&1 | \
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grep -v "Empty loadable segment detected" && \
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$$(NM_$(1)) $$(objcbfs)/$(1)_null.offenders | grep -q ""; if [ $$$$? -eq 0 ]; then \
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echo "Forbidden global variables in "$(1)":"; \
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$$(NM_$(1)) $$(objcbfs)/$(1)_null.offenders; false; \
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else true; fi
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endef
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###############################################################################
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# romstage
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###############################################################################
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ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32)$(CONFIG_ARCH_ROMSTAGE_X86_64),y)
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ifneq ($(CONFIG_ROMCC),y)
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@ -180,21 +197,11 @@ endif
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romstage-libs ?=
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ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32),y)
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romstage-oformat=elf32-i386
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$(eval $(call early_x86_stage,romstage,elf32-i386))
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else
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romstage-oformat=elf64-x86-64
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$(eval $(call early_x86_stage,romstage,elf64-x86-64))
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endif
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$(objcbfs)/romstage.debug: $$(romstage-objs) $$(romstage-libs)
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@printf " LINK $(subst $(obj)/,,$(@))\n"
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$(LD_romstage) $(LDFLAGS_romstage) -o $@ -L$(obj) $(COMPILER_RT_FLAGS_romstage) --whole-archive --start-group $(filter-out %.ld,$(romstage-objs)) $(romstage-libs) --no-whole-archive $(COMPILER_RT_romstage) --end-group -T $(obj)/arch/x86/memlayout.romstage.ld --oformat $(romstage-oformat)
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LANG=C LC_ALL= $(OBJCOPY_romstage) --only-section .illegal_globals $(@) $(objcbfs)/romstage_null.offenders 2>&1 | \
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grep -v "Empty loadable segment detected" && \
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if [ -n "`$(NM_romstage) $(objcbfs)/romstage_null.offenders 2>/dev/null`" ]; then \
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echo "Forbidden global variables in romstage:"; \
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$(NM_romstage) $(objcbfs)/romstage_null.offenders; false; \
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else true; fi
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# Compiling crt0 with -g seems to trigger https://sourceware.org/bugzilla/show_bug.cgi?id=6428
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romstage-S-ccopts += -I. -g0
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@ -29,9 +29,9 @@
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#endif
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/*
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* The romstage.inc is generated based on the requirements of the mainboard.
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* The assembly.inc is generated based on the requirements of the mainboard.
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* For example, for ROMCC boards the MAINBOARDDIR/romstage.c would be
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* processed by ROMCC and added. In non-ROMCC boards the chipsets'
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* cache-as-ram setup files would be here.
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*/
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#include <generated/romstage.inc>
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#include <generated/assembly.inc>
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