mb/google/puff: Set TCC offset to 5 for kaisa and duffy

Set tcc offset to 5 degree celsius for kaisa and duffy

BUG=b:166696500
BRANCH=puff
TEST=Build, and verify test result by thermal team.

Change-Id: I2bb977b98c0764f0b9cac3543074da56057717cf
Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44901
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Sam McNally <sammc@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
David Wu 2020-08-28 17:02:38 +08:00 committed by Edward O'Callaghan
parent 1c97793b79
commit 1bea841b2f
2 changed files with 2 additions and 0 deletions

View File

@ -1,4 +1,5 @@
chip soc/intel/cannonlake
register "tcc_offset" = "5" # TCC of 95C
# Auto-switch between X4 NVMe and X2 NVMe.
register "TetonGlacierMode" = "1"

View File

@ -1,4 +1,5 @@
chip soc/intel/cannonlake
register "tcc_offset" = "5" # TCC of 95C
# Auto-switch between X4 NVMe and X2 NVMe.
register "TetonGlacierMode" = "1"