mb/google/puff: Set TCC offset to 5 for kaisa and duffy
Set tcc offset to 5 degree celsius for kaisa and duffy BUG=b:166696500 BRANCH=puff TEST=Build, and verify test result by thermal team. Change-Id: I2bb977b98c0764f0b9cac3543074da56057717cf Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44901 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Sam McNally <sammc@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -1,4 +1,5 @@
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chip soc/intel/cannonlake
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register "tcc_offset" = "5" # TCC of 95C
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# Auto-switch between X4 NVMe and X2 NVMe.
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register "TetonGlacierMode" = "1"
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@ -1,4 +1,5 @@
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chip soc/intel/cannonlake
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register "tcc_offset" = "5" # TCC of 95C
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# Auto-switch between X4 NVMe and X2 NVMe.
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register "TetonGlacierMode" = "1"
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