mb/google/octopus: do UART pad configuration at board-level

UART pad configuration should not be done in common code, because that
may cause short circuits, when the user sets a wrong UART index. Thus,
add the corresponding pads to the early UART gpio table for the board as
a first step. Common UART pad config code then gets dropped in CB:48829.

Also switch to `bootblock_mainboard_early_init` to configure the pads in
early bootblock before console initialization, to make the console work
as early as possible. The board does not do any other gpio configuration
in bootblock, so this should not influence behaviour in a negative way
(e.g. breaking overrides).

Change-Id: Ieeb738afd54e77ee853ee109009f611411aa0d4a
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49426
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Michael Niewöhner 2020-12-21 03:46:58 +01:00
parent 805b96cdc6
commit 1c22753996
2 changed files with 11 additions and 3 deletions

View File

@ -5,14 +5,20 @@
#include <ec/ec.h>
#include <soc/gpio.h>
void bootblock_mainboard_early_init(void)
{
const struct pad_config *pads;
size_t num;
pads = mainboard_early_bootblock_gpio_table(&num);
gpio_configure_pads(pads, num);
};
void bootblock_mainboard_init(void)
{
const struct pad_config *pads, *override_pads;
size_t num, override_num;
pads = mainboard_early_bootblock_gpio_table(&num);
gpio_configure_pads(pads, num);
/*
* Perform EC init before configuring GPIOs. This is because variant
* might talk to the EC to get board id and hence it will require EC

View File

@ -294,6 +294,8 @@ const struct pad_config *__weak variant_early_override_gpio_table(size_t *num)
static const struct pad_config early_bootblock_gpio_table[] = {
PAD_NC(GPIO_154, NONE), /* LPC_CLKRUNB -- NC for eSPI */
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_64, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_UART2_RXD */
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_65, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), /* LPSS_UART2_TXD */
};
const struct pad_config *mainboard_early_bootblock_gpio_table(size_t *num)