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soc/amd/sabrina: update PCI devices in devicetree.cb 

Also update mb/amd/chausie accordingly.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Idb4dcffa48c3dbdcffb66f1398b99ee96562efb9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61093
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
This commit is contained in:
Felix Held 2022-01-13 00:00:15 +01:00
parent 9517ae9f69
commit 1c3b2a706e
2 changed files with 2 additions and 13 deletions
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1
src/mainboard/amd/chausie/devicetree.cb
View File

@ -25,7 +25,6 @@ chip soc/amd/sabrina
device domain 0 on device domain 0 on
device ref iommu on end device ref iommu on end
device ref gpp_gfx_bridge_0 on end # MXM
device ref gpp_bridge_0 on end # NVMe device ref gpp_bridge_0 on end # NVMe
device ref gpp_bridge_1 on end device ref gpp_bridge_1 on end
device ref gpp_bridge_2 on end # WWAN device ref gpp_bridge_2 on end # WWAN

14
src/soc/amd/sabrina/chipset.cb
View File

@ -7,10 +7,7 @@ chip soc/amd/sabrina
device pci 00.0 alias gnb on end device pci 00.0 alias gnb on end
device pci 00.2 alias iommu off end device pci 00.2 alias iommu off end
device pci 01.0 on end # Dummy Host Bridge, do not disable device pci 01.0 on end # Dummy Host Bridge
device pci 01.1 alias gpp_gfx_bridge_0 off end
device pci 01.2 alias gpp_gfx_bridge_1 off end
device pci 01.3 alias gpp_gfx_bridge_2 off end
device pci 02.0 on end # Dummy Host Bridge, do not disable device pci 02.0 on end # Dummy Host Bridge, do not disable
device pci 02.1 alias gpp_bridge_0 off end device pci 02.1 alias gpp_bridge_0 off end
@ -19,7 +16,6 @@ chip soc/amd/sabrina
device pci 02.4 alias gpp_bridge_3 off end device pci 02.4 alias gpp_bridge_3 off end
device pci 02.5 alias gpp_bridge_4 off end device pci 02.5 alias gpp_bridge_4 off end
device pci 02.6 alias gpp_bridge_5 off end device pci 02.6 alias gpp_bridge_5 off end
device pci 02.7 alias gpp_bridge_6 off end
device pci 08.0 on end # Dummy Host Bridge, do not disable device pci 08.0 on end # Dummy Host Bridge, do not disable
device pci 08.1 alias gpp_bridge_a off # Internal GPP Bridge 0 to Bus A device pci 08.1 alias gpp_bridge_a off # Internal GPP Bridge 0 to Bus A
@ -80,15 +76,9 @@ chip soc/amd/sabrina
device pci 0.6 alias hda off end # Audio Processor HD Audio Controller (main AZ) device pci 0.6 alias hda off end # Audio Processor HD Audio Controller (main AZ)
device pci 0.7 alias mp2 off end # Sensor Fusion Hub (MP2) device pci 0.7 alias mp2 off end # Sensor Fusion Hub (MP2)
end end
device pci 08.2 alias gpp_bridge_b off # Internal GPP Bridge 1 to Bus B device pci 08.2 alias gpp_bridge_b off end # Internal GPP Bridge 1 to Bus B
device pci 0.0 alias sata_0 off end # first SATA controller; AHCI Mode
device pci 0.1 alias sata_1 off end # second SATA Controller; SATA Raid/AHCI Mode
device pci 0.2 alias xgbe_0 off end # 10 GbE Controller Port 0 (XGBE0)
device pci 0.3 alias xgbe_1 off end # 10 GbE Controller Port 1 (XGBE1)
end
device pci 08.3 alias gpp_bridge_c off # Internal GPP Bridge 2 to Bus C device pci 08.3 alias gpp_bridge_c off # Internal GPP Bridge 2 to Bus C
device pci 0.0 alias dummy_function_c off end # PCIe Dummy Function device pci 0.0 alias dummy_function_c off end # PCIe Dummy Function
device pci 0.2 alias i2s_ac97 off end # I2S/AC'97 Audio
end end
device pci 14.0 alias smbus on end # primary FCH function device pci 14.0 alias smbus on end # primary FCH function