arch/x86/c_start.S: Add proper x86_64 code
Don't truncate upper bits in assembly code and thus allow loading of ramstage above 4GiB. Tested on qemu with cbmem_top set to TOUUD. Change-Id: Ifc9b45f69d0b7534b2faacaad0d099cef2667478 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Co-authored-by: Benjamin Doron <benjamin.doron@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59874 Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -59,6 +59,24 @@ _start:
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leal _stack, %edi
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#endif
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#if ENV_X86_64
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/** poison the stack. Code should not count on the
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* stack being full of zeros. This stack poisoning
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* recently uncovered a bug in the broadcast SIPI
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* code.
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*/
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movabs $_estack, %rcx
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sub %rdi, %rcx
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shr $3, %rcx /* it is 64 bit aligned, right? */
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movq $0xDEADBEEFDEADBEEF, %rax
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rep
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stosq
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/* Set new stack with enforced alignment. */
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movabs $_estack, %rsp
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movq $(0xfffffffffffffff0), %rax
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and %rax, %rsp
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#else
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/** poison the stack. Code should not count on the
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* stack being full of zeros. This stack poisoning
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* recently uncovered a bug in the broadcast SIPI
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@ -74,6 +92,7 @@ _start:
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/* Set new stack with enforced alignment. */
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movl $_estack, %esp
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andl $(0xfffffff0), %esp
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#endif
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/*
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* Now we are finished. Memory is up, data is copied and
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@ -82,7 +101,12 @@ _start:
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*/
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post_code(POSTCODE_PRE_HARDWAREMAIN) /* post 6e */
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#if ENV_X86_64
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movq $0xFFFFFFFFFFFFFFF0, %rax
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and %rax, %rsp
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#else
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andl $0xFFFFFFF0, %esp
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#endif
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#if CONFIG(ASAN_IN_RAMSTAGE)
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call asan_init
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