mb/google/nissa: Modify FMD to redistribute buffer
Modify the chromeos FMD file for nissa variants to redistribute the buffer in SI_ME region obtained due to CSE size optimizations to SI_BIOS region. 1. Modify SI_ALL region size to 3712K. SI_DESC remains at 4K and SI_ME is 3708K. 2. Modify SI_BIOS region to 12672K. This results in an addition of 32K buffer each to FW_MAIN_A/B regions. BUG=b:228936671 BRANCH=firmware-nissa-15217.B TEST=Verify CSE FW update with new FMD and ME RW blobs on craask. Cq-Depend: chrome-internal:5094491 Change-Id: I5ead2f81850a2aa79e677c7f271db672e235750a Signed-off-by: Krishna P Bhat D <krishna.p.bhat.d@intel.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69683 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Reka Norman <rekanorman@chromium.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
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@ -1,10 +1,10 @@
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FLASH 16M {
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SI_ALL 3776K {
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SI_ALL 3712K {
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SI_DESC 4K
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SI_ME
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}
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SI_BIOS 12608K {
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RW_SECTION_A 4180K {
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SI_BIOS 12672K {
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RW_SECTION_A 4212K {
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VBLOCK_A 8K
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FW_MAIN_A(CBFS)
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RW_FWID_A 64
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@ -22,7 +22,7 @@ FLASH 16M {
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RW_VPD(PRESERVE) 8K
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RW_NVRAM(PRESERVE) 8K
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}
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RW_SECTION_B 4180K {
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RW_SECTION_B 4212K {
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VBLOCK_B 8K
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FW_MAIN_B(CBFS)
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RW_FWID_B 64
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@ -1,10 +1,10 @@
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FLASH 16M {
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SI_ALL 3776K {
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SI_ALL 3712K {
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SI_DESC 4K
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SI_ME
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}
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SI_BIOS 12608K {
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RW_SECTION_A 3668K {
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SI_BIOS 12672K {
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RW_SECTION_A 3700K {
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VBLOCK_A 8K
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FW_MAIN_A(CBFS)
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RW_FWID_A 64
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@ -23,7 +23,7 @@ FLASH 16M {
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RW_VPD(PRESERVE) 8K
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RW_NVRAM(PRESERVE) 8K
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}
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RW_SECTION_B 3668K {
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RW_SECTION_B 3700K {
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VBLOCK_B 8K
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FW_MAIN_B(CBFS)
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RW_FWID_B 64
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@ -1,10 +1,10 @@
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FLASH 32M {
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SI_ALL 3776K {
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SI_ALL 3712K {
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SI_DESC 4K
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SI_ME
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}
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SI_BIOS 28992K {
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RW_SECTION_A 4344K {
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SI_BIOS 29056K {
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RW_SECTION_A 4376K {
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VBLOCK_A 8K
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FW_MAIN_A(CBFS)
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RW_FWID_A 64
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@ -24,19 +24,19 @@ FLASH 32M {
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RW_NVRAM(PRESERVE) 8K
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}
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# RW UNUSED Region 1.
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RW_UNUSED_1 7088K
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RW_UNUSED_1 7120K
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# This section starts at the 16M boundary in SPI flash.
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# ADL does not support a region crossing this boundary,
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# because the SPI flash is memory-mapped into two non-
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# contiguous windows.
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RW_SECTION_B 4344K {
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RW_SECTION_B 4376K {
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VBLOCK_B 8K
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FW_MAIN_B(CBFS)
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RW_FWID_B 64
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ME_RW_B(CBFS) 1434K
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}
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# RW UNUSED Region 2.
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RW_UNUSED_2 7944K
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RW_UNUSED_2 7912K
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# Make WP_RO region align with SPI vendor
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# memory protected range specification.
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WP_RO 4M {
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