soc/mediatek/mt8195: Add NOR-Flash support
TEST=boot to romstage on MT8195 EVB Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> Change-Id: I450281fb4b1750e59cb76f6b2083f0e2889fd4cc Reviewed-on: https://review.coreboot.org/c/coreboot/+/52875 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
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@ -17,4 +17,11 @@ config VBOOT
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select VBOOT_SEPARATE_VERSTAGE
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select VBOOT_RETURN_FROM_VERSTAGE
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config FLASH_DUAL_READ
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bool
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default y
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help
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When this option is enabled, the flash controller provides the ability
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to dual read mode.
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endif
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@ -1,6 +1,7 @@
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ifeq ($(CONFIG_SOC_MEDIATEK_MT8195),y)
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bootblock-y += bootblock.c
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bootblock-y += ../common/flash_controller.c
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bootblock-y += ../common/gpio.c gpio.c
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bootblock-y += ../common/mmu_operations.c
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bootblock-y += ../common/pll.c pll.c
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@ -9,6 +10,7 @@ bootblock-y += ../common/timer.c timer.c
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bootblock-y += ../common/uart.c
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bootblock-y += ../common/wdt.c
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verstage-y += ../common/flash_controller.c
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verstage-y += ../common/gpio.c gpio.c
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verstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
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verstage-y += ../common/timer.c timer.c
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@ -17,6 +19,7 @@ verstage-y += ../common/wdt.c
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romstage-y += ../common/cbmem.c
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romstage-y += emi.c
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romstage-y += ../common/flash_controller.c
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romstage-y += ../common/gpio.c gpio.c
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romstage-y += ../common/pll.c pll.c
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romstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
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@ -30,6 +33,7 @@ romstage-y += ../common/mt6315.c mt6315.c
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romstage-y += ../common/mt6359p.c mt6359p.c
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ramstage-y += emi.c
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ramstage-y += ../common/flash_controller.c
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ramstage-y += ../common/gpio.c gpio.c
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ramstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
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ramstage-y += soc.c
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@ -0,0 +1,9 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _SOC_MEDIATEK_MT8195_SYMBOLS_H_
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#define _SOC_MEDIATEK_MT8195_SYMBOLS_H_
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#include <symbols.h>
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DECLARE_REGION(dram_dma)
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#endif /* _SOC_MEDIATEK_MT8195_SYMBOLS_H_ */
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@ -3,6 +3,7 @@
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#include <assert.h>
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#include <device/mmio.h>
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#include <soc/addressmap.h>
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#include <soc/flash_controller_common.h>
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#include <soc/gpio.h>
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#include <soc/spi.h>
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@ -93,6 +94,7 @@ void mtk_spi_set_gpio_pinmux(unsigned int bus, enum spi_pad_mask pad_select)
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static const struct spi_ctrlr spi_flash_ctrlr = {
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.max_xfer_size = 65535,
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.flash_probe = mtk_spi_flash_probe,
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};
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const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
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@ -103,6 +105,8 @@ const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
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},
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{
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.ctrlr = &spi_flash_ctrlr,
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.bus_start = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS,
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.bus_end = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS,
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},
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};
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