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soc/amd/picasso: Disable CBFS MCACHE again 

This is still causing boot errors on zork:

coreboot-4.13-3659-g269e03d5c42f Fri May  7 22:03:11 UTC 2021 bootblock starting (log level: 8)...
Family_Model: 00820f01
PSP boot mode: Development
Silicon level: Pre-Production
Set power off after power failure.
PMxC0 STATUS: 0x800 BIT11
I2C bus 3 version 0x3132322a
DW I2C bus 3 at 0xfedc5000 (400 KHz)
FMAP: area COREBOOT found @ 875000 (7909376 bytes)
ASSERTION ERROR: file 'src/commonlib/bsd/cbfs_mcache.c', line 106

BUG=b:177323348
TEST=Boot ezkinil to OS

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I68b4b73670e750207414f0d85ff96f21481be8ce
Reviewed-on: https://review.coreboot.org/c/coreboot/+/53933
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Raul E Rangel 2020-12-16 10:35:49 -07:00 committed by Patrick Georgi
parent 7557c25f10
commit 1c9a5ccbe5
1 changed files with 1 additions and 0 deletions
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src/soc/amd/picasso/Kconfig
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@ -66,6 +66,7 @@ config CPU_SPECIFIC_OPTIONS
select FSP_COMPRESS_FSP_S_LZMA
select UDK_2017_BINDING
select HAVE_CF9_RESET
select NO_CBFS_MCACHE if VBOOT_STARTS_BEFORE_BOOTBLOCK
config SOC_AMD_COMMON_BLOCK_UCODE_SIZE
default 3200