diff --git a/src/include/device/smbus_host.h b/src/include/device/smbus_host.h
new file mode 100644
index 0000000000..2aa160ffbd
--- /dev/null
+++ b/src/include/device/smbus_host.h
@@ -0,0 +1,35 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __DEVICE_SMBUS_HOST_H__
+#define __DEVICE_SMBUS_HOST_H__
+
+#include <stdint.h>
+
+/* Low-level SMBUS host controller. */
+
+int do_smbus_recv_byte(uintptr_t base, u8 device);
+int do_smbus_send_byte(uintptr_t base, u8 device, u8 val);
+int do_smbus_read_byte(uintptr_t base, u8 device, u8 address);
+int do_smbus_write_byte(uintptr_t base, u8 device, u8 address, u8 data);
+int do_smbus_read_word(uintptr_t base, u8 device, u8 address);
+int do_smbus_write_word(uintptr_t base, u8 device, u8 address, u16 data);
+
+int do_smbus_block_read(uintptr_t base, u8 device, u8 cmd, size_t max_bytes, u8 *buf);
+int do_smbus_block_write(uintptr_t base, u8 device, u8 cmd, size_t bytes, const u8 *buf);
+
+/* For Intel, implemented since ICH5. */
+int do_i2c_eeprom_read(uintptr_t base, u8 device, u8 offset, size_t bytes, u8 *buf);
+int do_i2c_block_write(uintptr_t base, u8 device, size_t bytes, u8 *buf);
+
+#endif
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index 0362330734..de6a542745 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -23,11 +23,11 @@
 #include <arch/cpu.h>
 #include <device/mmio.h>
 #include <device/pci_ops.h>
+#include <device/smbus_host.h>
 #include <cbmem.h>
 #include <timestamp.h>
 #include <mrc_cache.h>
 #include <southbridge/intel/bd82x6x/me.h>
-#include <southbridge/intel/common/smbus.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <cpu/x86/msr.h>
 #include <types.h>
diff --git a/src/soc/intel/braswell/smbus.c b/src/soc/intel/braswell/smbus.c
index abf2fea89f..a1a0a89598 100644
--- a/src/soc/intel/braswell/smbus.c
+++ b/src/soc/intel/braswell/smbus.c
@@ -20,8 +20,8 @@
 #include <device/pci_def.h>
 #include <device/pci_type.h>
 #include <device/pci_ops.h>
+#include <device/smbus_host.h>
 #include <soc/smbus.h>
-#include <southbridge/intel/common/smbus.h>
 
 int smbus_i2c_block_write(u8 addr, u8 bytes, u8 *buf)
 {
diff --git a/src/soc/intel/broadwell/smbus.c b/src/soc/intel/broadwell/smbus.c
index 35fbc24068..c32e31d6a9 100644
--- a/src/soc/intel/broadwell/smbus.c
+++ b/src/soc/intel/broadwell/smbus.c
@@ -25,6 +25,7 @@
 #include <soc/ramstage.h>
 #include <soc/smbus.h>
 #include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
 
 static void pch_smbus_init(struct device *dev)
 {
diff --git a/src/soc/intel/common/block/smbus/smbus.c b/src/soc/intel/common/block/smbus/smbus.c
index 95def1116e..ce75f3a891 100644
--- a/src/soc/intel/common/block/smbus/smbus.c
+++ b/src/soc/intel/common/block/smbus/smbus.c
@@ -21,6 +21,7 @@
 #include <device/pci_ids.h>
 #include <soc/smbus.h>
 #include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
 #include "smbuslib.h"
 
 static int lsmbus_read_byte(struct device *dev, u8 address)
diff --git a/src/soc/intel/common/block/smbus/smbuslib.c b/src/soc/intel/common/block/smbus/smbuslib.c
index 126adee06b..aad5228178 100644
--- a/src/soc/intel/common/block/smbus/smbuslib.c
+++ b/src/soc/intel/common/block/smbus/smbuslib.c
@@ -15,7 +15,7 @@
 
 #include <console/console.h>
 #include <spd_bin.h>
-#include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
 #include <string.h>
 #include "smbuslib.h"
 
diff --git a/src/southbridge/intel/bd82x6x/early_smbus.c b/src/southbridge/intel/bd82x6x/early_smbus.c
index f5700401be..61625ccdf3 100644
--- a/src/southbridge/intel/bd82x6x/early_smbus.c
+++ b/src/southbridge/intel/bd82x6x/early_smbus.c
@@ -19,6 +19,7 @@
 #include <console/console.h>
 #include <device/pci_def.h>
 #include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
 #include "pch.h"
 
 void enable_smbus(void)
diff --git a/src/southbridge/intel/bd82x6x/smbus.c b/src/southbridge/intel/bd82x6x/smbus.c
index 4fb7539889..0a9c17598e 100644
--- a/src/southbridge/intel/bd82x6x/smbus.c
+++ b/src/southbridge/intel/bd82x6x/smbus.c
@@ -22,6 +22,7 @@
 #include <device/pci_ops.h>
 #include <arch/io.h>
 #include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
 #include "pch.h"
 
 static void pch_smbus_init(struct device *dev)
diff --git a/src/southbridge/intel/common/smbus.c b/src/southbridge/intel/common/smbus.c
index 962a7621d9..1b005d78e0 100644
--- a/src/southbridge/intel/common/smbus.c
+++ b/src/southbridge/intel/common/smbus.c
@@ -19,6 +19,7 @@
 #include <arch/io.h>
 #include <console/console.h>
 #include <device/smbus_def.h>
+#include <device/smbus_host.h>
 #include <types.h>
 
 #include "smbus.h"
@@ -332,30 +333,27 @@ static int block_cmd_loop(uintptr_t base, u8 *buf, size_t max_bytes, int flags)
 	return bytes;
 }
 
-int do_smbus_read_byte(unsigned int smbus_base, u8 device, unsigned int address)
+int do_smbus_read_byte(uintptr_t smbus_base, u8 device, u8 address)
 {
 	return smbus_read_cmd(smbus_base, I801_BYTE_DATA, device, address);
 }
 
-int do_smbus_read_word(unsigned int smbus_base, u8 device, unsigned int address)
+int do_smbus_read_word(uintptr_t smbus_base, u8 device, u8 address)
 {
 	return smbus_read_cmd(smbus_base, I801_WORD_DATA, device, address);
 }
 
-int do_smbus_write_byte(unsigned int smbus_base, u8 device, unsigned int address,
-			unsigned int data)
+int do_smbus_write_byte(uintptr_t smbus_base, u8 device, u8 address, u8 data)
 {
 	return smbus_write_cmd(smbus_base, I801_BYTE_DATA, device, address, data);
 }
 
-int do_smbus_write_word(unsigned int smbus_base, u8 device, unsigned int address,
-			unsigned int data)
+int do_smbus_write_word(uintptr_t smbus_base, u8 device, u8 address, u16 data)
 {
 	return smbus_write_cmd(smbus_base, I801_WORD_DATA, device, address, data);
 }
 
-int do_smbus_block_read(unsigned int smbus_base, u8 device, u8 cmd,
-			unsigned int max_bytes, u8 *buf)
+int do_smbus_block_read(uintptr_t smbus_base, u8 device, u8 cmd, size_t max_bytes, u8 *buf)
 {
 	int ret, slave_bytes;
 
@@ -382,8 +380,7 @@ int do_smbus_block_read(unsigned int smbus_base, u8 device, u8 cmd,
 	return ret;
 }
 
-int do_smbus_block_write(unsigned int smbus_base, u8 device, u8 cmd,
-			const unsigned int bytes, const u8 *buf)
+int do_smbus_block_write(uintptr_t smbus_base, u8 device, u8 cmd, const size_t bytes, const u8 *buf)
 {
 	int ret;
 
@@ -418,8 +415,7 @@ static int has_i2c_read_command(void)
 	return 1;
 }
 
-int do_i2c_eeprom_read(unsigned int smbus_base, u8 device,
-		unsigned int offset, const unsigned int bytes, u8 *buf)
+int do_i2c_eeprom_read(uintptr_t smbus_base, u8 device, u8 offset, const size_t bytes, u8 *buf)
 {
 	int ret;
 
@@ -456,8 +452,7 @@ int do_i2c_eeprom_read(unsigned int smbus_base, u8 device,
  * The caller is responsible of settings HOSTC I2C_EN bit prior to making this
  * call!
  */
-int do_i2c_block_write(unsigned int smbus_base, u8 device,
-			unsigned int bytes, u8 *buf)
+int do_i2c_block_write(uintptr_t smbus_base, u8 device, size_t bytes, u8 *buf)
 {
 	u8 cmd;
 	int ret;
diff --git a/src/southbridge/intel/common/smbus.h b/src/southbridge/intel/common/smbus.h
index c70a3ee596..20443e1060 100644
--- a/src/southbridge/intel/common/smbus.h
+++ b/src/southbridge/intel/common/smbus.h
@@ -32,22 +32,4 @@
 #define SMBUS_PIN_CTL		0xf
 #define SMBSLVCMD		0x11
 
-int do_smbus_read_byte(unsigned int smbus_base, u8 device,
-		unsigned int address);
-int do_smbus_write_byte(unsigned int smbus_base, u8 device,
-			unsigned int address, unsigned int data);
-int do_smbus_read_word(unsigned int smbus_base, u8 device,
-		unsigned int address);
-int do_smbus_write_word(unsigned int smbus_base, u8 device,
-			unsigned int address, unsigned int data);
-
-int do_smbus_block_read(unsigned int smbus_base, u8 device,
-			u8 cmd, unsigned int max_bytes, u8 *buf);
-int do_smbus_block_write(unsigned int smbus_base, u8 device,
-			u8 cmd, unsigned int bytes, const u8 *buf);
-/* Only since ICH5 */
-int do_i2c_eeprom_read(unsigned int smbus_base, u8 device,
-		unsigned int offset, unsigned int bytes, u8 *buf);
-int do_i2c_block_write(unsigned int smbus_base, u8 device,
-			unsigned int bytes, u8 *buf);
 #endif
diff --git a/src/southbridge/intel/i82371eb/early_smbus.c b/src/southbridge/intel/i82371eb/early_smbus.c
index b8b6dbad59..4168a057ef 100644
--- a/src/southbridge/intel/i82371eb/early_smbus.c
+++ b/src/southbridge/intel/i82371eb/early_smbus.c
@@ -21,6 +21,7 @@
 #include <device/pci_ids.h>
 #include <device/pci_def.h>
 #include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
 #include "i82371eb.h"
 
 void enable_smbus(void)
diff --git a/src/southbridge/intel/i82371eb/smbus.c b/src/southbridge/intel/i82371eb/smbus.c
index 36a9f560fc..9d7107442e 100644
--- a/src/southbridge/intel/i82371eb/smbus.c
+++ b/src/southbridge/intel/i82371eb/smbus.c
@@ -25,7 +25,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/smbus.h>
-#include <southbridge/intel/common/smbus.h>
 #include "chip.h"
 #include "i82371eb.h"
 
diff --git a/src/southbridge/intel/i82801dx/early_smbus.c b/src/southbridge/intel/i82801dx/early_smbus.c
index 83fd9a13c8..5e82ded6be 100644
--- a/src/southbridge/intel/i82801dx/early_smbus.c
+++ b/src/southbridge/intel/i82801dx/early_smbus.c
@@ -19,6 +19,7 @@
 #include <device/pci_def.h>
 #include <console/console.h>
 #include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
 
 #include "i82801dx.h"
 
diff --git a/src/southbridge/intel/i82801gx/early_smbus.c b/src/southbridge/intel/i82801gx/early_smbus.c
index e970937e88..49056eba83 100644
--- a/src/southbridge/intel/i82801gx/early_smbus.c
+++ b/src/southbridge/intel/i82801gx/early_smbus.c
@@ -19,6 +19,7 @@
 #include <console/console.h>
 #include <device/pci_def.h>
 #include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
 #include "i82801gx.h"
 
 void enable_smbus(void)
diff --git a/src/southbridge/intel/i82801gx/smbus.c b/src/southbridge/intel/i82801gx/smbus.c
index b2341a11d1..9261690dbd 100644
--- a/src/southbridge/intel/i82801gx/smbus.c
+++ b/src/southbridge/intel/i82801gx/smbus.c
@@ -19,7 +19,7 @@
 #include <device/smbus.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
 #include "i82801gx.h"
 
 static int lsmbus_read_byte(struct device *dev, u8 address)
diff --git a/src/southbridge/intel/i82801ix/early_smbus.c b/src/southbridge/intel/i82801ix/early_smbus.c
index e686d48127..e067733a55 100644
--- a/src/southbridge/intel/i82801ix/early_smbus.c
+++ b/src/southbridge/intel/i82801ix/early_smbus.c
@@ -21,6 +21,7 @@
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
 #include "i82801ix.h"
 
 void enable_smbus(void)
diff --git a/src/southbridge/intel/i82801ix/smbus.c b/src/southbridge/intel/i82801ix/smbus.c
index b8e9cfd695..bd84807823 100644
--- a/src/southbridge/intel/i82801ix/smbus.c
+++ b/src/southbridge/intel/i82801ix/smbus.c
@@ -20,7 +20,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
 #include "i82801ix.h"
 
 static void pch_smbus_init(struct device *dev)
diff --git a/src/southbridge/intel/i82801jx/early_smbus.c b/src/southbridge/intel/i82801jx/early_smbus.c
index adba27ca71..f841355f1a 100644
--- a/src/southbridge/intel/i82801jx/early_smbus.c
+++ b/src/southbridge/intel/i82801jx/early_smbus.c
@@ -20,6 +20,7 @@
 #include <console/console.h>
 #include <device/pci_def.h>
 #include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
 #include "i82801jx.h"
 
 void enable_smbus(void)
diff --git a/src/southbridge/intel/i82801jx/smbus.c b/src/southbridge/intel/i82801jx/smbus.c
index d366703a66..68f2317ff0 100644
--- a/src/southbridge/intel/i82801jx/smbus.c
+++ b/src/southbridge/intel/i82801jx/smbus.c
@@ -20,7 +20,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
 #include "i82801jx.h"
 
 static void pch_smbus_init(struct device *dev)
diff --git a/src/southbridge/intel/ibexpeak/early_smbus.c b/src/southbridge/intel/ibexpeak/early_smbus.c
index bd130c0a99..0d18ed0b7c 100644
--- a/src/southbridge/intel/ibexpeak/early_smbus.c
+++ b/src/southbridge/intel/ibexpeak/early_smbus.c
@@ -19,6 +19,7 @@
 #include <console/console.h>
 #include <device/pci_def.h>
 #include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
 #include "pch.h"
 
 void enable_smbus(void)
diff --git a/src/southbridge/intel/ibexpeak/smbus.c b/src/southbridge/intel/ibexpeak/smbus.c
index dd3abfe60c..9168cffb24 100644
--- a/src/southbridge/intel/ibexpeak/smbus.c
+++ b/src/southbridge/intel/ibexpeak/smbus.c
@@ -22,6 +22,7 @@
 #include <device/pci_ops.h>
 #include <arch/io.h>
 #include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
 #include "pch.h"
 
 static void pch_smbus_init(struct device *dev)
diff --git a/src/southbridge/intel/lynxpoint/early_smbus.c b/src/southbridge/intel/lynxpoint/early_smbus.c
index f5700401be..61625ccdf3 100644
--- a/src/southbridge/intel/lynxpoint/early_smbus.c
+++ b/src/southbridge/intel/lynxpoint/early_smbus.c
@@ -19,6 +19,7 @@
 #include <console/console.h>
 #include <device/pci_def.h>
 #include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
 #include "pch.h"
 
 void enable_smbus(void)
diff --git a/src/southbridge/intel/lynxpoint/smbus.c b/src/southbridge/intel/lynxpoint/smbus.c
index c12b29eb36..24beaf2fde 100644
--- a/src/southbridge/intel/lynxpoint/smbus.c
+++ b/src/southbridge/intel/lynxpoint/smbus.c
@@ -22,6 +22,7 @@
 #include <device/pci_ops.h>
 #include <arch/io.h>
 #include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
 #include "pch.h"
 
 static void pch_smbus_init(struct device *dev)