Use defines for some i82801ex/gx registers
Change-Id: I0069ec26278b82d61ce5bcfb94d77647dfd3254b Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/2530 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -12,4 +12,11 @@ extern void i82801ex_enable(device_t dev);
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#define RTC_CONF 0xd8
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#define GEN_PMCON_3 0xa4
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#define PMBASE 0x40
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#define ACPI_CNTL 0x44
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#define ACPI_EN (1 << 4)
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#define GPIO_BASE 0x58
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#define GPIO_CNTL 0x5C
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#define GPIO_EN (1 << 4)
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#endif /* I82801EX_H */
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@ -12,8 +12,6 @@
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#include <arch/ioapic.h>
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#include "i82801ex.h"
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#define ACPI_BAR 0x40
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#define GPIO_BAR 0x58
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#define NMI_OFF 0
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#define MAINBOARD_POWER_OFF 0
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@ -193,7 +191,7 @@ static void i82801ex_gpio_init(device_t dev)
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/* Get the chip configuration */
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config = dev->chip_info;
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/* Find the GPIO bar */
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res = find_resource(dev, GPIO_BAR);
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res = find_resource(dev, GPIO_BASE);
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if (!res) {
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return;
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}
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@ -295,10 +293,10 @@ static void i82801ex_lpc_read_resources(device_t dev)
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pci_dev_read_resources(dev);
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/* Add the ACPI BAR */
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res = pci_get_resource(dev, ACPI_BAR);
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res = pci_get_resource(dev, PMBASE);
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/* Add the GPIO BAR */
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res = pci_get_resource(dev, GPIO_BAR);
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res = pci_get_resource(dev, GPIO_BASE);
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/* Add an extra subtractive resource for both memory and I/O. */
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res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
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@ -80,6 +80,7 @@ int smbus_read_byte(unsigned device, unsigned address);
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#define PMBASE 0x40
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#define ACPI_CNTL 0x44
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#define ACPI_EN (1 << 7)
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#define BIOS_CNTL 0xDC
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#define GPIO_BASE 0x48 /* LPC GPIO Base Address Register */
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#define GPIO_CNTL 0x4C /* LPC GPIO Control Register */
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@ -49,7 +49,7 @@ static void i82801gx_enable_apic(struct device *dev)
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/* Enable ACPI I/O and power management.
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* Set SCI IRQ to IRQ9
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*/
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pci_write_config8(dev, ACPI_CNTL, 0x80);
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pci_write_config8(dev, ACPI_CNTL, ACPI_EN);
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*ioapic_index = 0;
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*ioapic_data = (1 << 25);
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