Ibexpeak: add missing thermal init.
Without it ME doesn't always start correctly and no temperature is reported, no fan management and so on. Change-Id: Iff71f3afbc35a1453a20d182890ae2d196c556bd Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4636 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
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@ -315,6 +315,8 @@ void main(unsigned long bist)
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pci_read_config8(PCH_LPC_DEV, GEN_PMCON_3) | 2);
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}
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early_thermal_init();
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timestamp_add_now(TS_BEFORE_INITRAM);
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raminit(s3resume);
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@ -45,7 +45,7 @@ smm-$(CONFIG_SPI_FLASH_SMM) += spi.c
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ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
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smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me.c ../bd82x6x/me_8.x.c ../bd82x6x/finalize.c ../bd82x6x/pch.c
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romstage-y += ../bd82x6x/early_usb.c early_smbus.c ../bd82x6x/early_me.c ../bd82x6x/me_status.c ../bd82x6x/gpio.c
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romstage-y += ../bd82x6x/early_usb.c early_smbus.c ../bd82x6x/early_me.c ../bd82x6x/me_status.c ../bd82x6x/gpio.c early_thermal.c
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romstage-y += ../bd82x6x/reset.c
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romstage-$(CONFIG_SOUTHBRIDGE_INTEL_BD82X6X) += ../bd82x6x/early_spi.c
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romstage-$(CONFIG_SOUTHBRIDGE_INTEL_C216) += ../bd82x6x/early_spi.c
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@ -0,0 +1,47 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2014 Vladimir Serbinenko
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/io.h>
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#include "pch.h"
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/* Early thermal init, must be done prior to giving ME its memory
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which is done at the end of raminit. */
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void early_thermal_init(void)
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{
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device_t dev;
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dev = PCI_DEV(0x0, 0x1f, 0x6);
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/* Program address for temporary BAR. */
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pci_write_config32(dev, 0x40, 0x40000000);
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pci_write_config32(dev, 0x44, 0x0);
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/* Activate temporary BAR. */
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pci_write_config32(dev, 0x40,
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pci_read_config32(dev, 0x40) | 5);
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/* Perform init. */
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write16(0x4000001a, (read16(0x4000001a) & ~0xf) | 0x10f0);
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/* Disable temporary BAR. */
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pci_write_config32(dev, 0x40,
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pci_read_config32(dev, 0x40) & ~1);
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pci_write_config32(dev, 0x40, 0);
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}
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@ -78,6 +78,7 @@ int smbus_write_byte(unsigned device, unsigned address, u8 data);
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int smbus_block_read(unsigned device, unsigned cmd, u8 bytes, u8 *buf);
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int smbus_block_write(unsigned device, unsigned cmd, u8 bytes, const u8 *buf);
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int early_spi_read(u32 offset, u32 size, u8 *buffer);
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void early_thermal_init(void);
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#endif
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#endif
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