mainboard/google/kahlee: Update memory.c
This fixes some issues with the initial implementation that was copied from reef. - The board ID value shouldn't be size_t - it's not a size. - Kahlee doesn't even need the memory.c file - it uses an SoDIMM. BUG=b:68293392 TEST=build stoney platforms, boot kahleebo Change-Id: Ife5660d36912e887edfd0365a9f16c5a172c9c86 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/22515 Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -23,6 +23,6 @@
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const GPIO_CONTROL *get_gpio_table(void);
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const struct sci_source *get_gpe_table(size_t *num);
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size_t variant_board_id(void);
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uint8_t variant_board_id(void);
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#endif /* __BASEBOARD_VARIANTS_H__ */
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@ -17,7 +17,7 @@
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#include <baseboard/variants.h>
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#include <variant/gpio.h>
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size_t __attribute__((weak)) variant_board_id(void)
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uint8_t __attribute__((weak)) variant_board_id(void)
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{
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gpio_t pads[] = {
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[3] = MEM_CONFIG3,
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@ -26,5 +26,5 @@ size_t __attribute__((weak)) variant_board_id(void)
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[0] = MEM_CONFIG0,
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};
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return gpio_pullup_base2_value(pads, ARRAY_SIZE(pads));
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return gpio_base2_value(pads, ARRAY_SIZE(pads));
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}
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@ -16,7 +16,5 @@
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bootblock-y += gpio.c
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romstage-y += gpio.c
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romstage-y += memory.c
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ramstage-y += gpio.c
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ramstage-y += memory.c
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@ -1,29 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2017 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <gpio.h> /* src/include/gpio.h */
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#include <baseboard/variants.h>
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#include <baseboard/gpio.h>
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size_t variant_board_id(void)
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{
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gpio_t pads[] = {
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[2] = MEM_CONFIG2,
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[1] = MEM_CONFIG1,
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[0] = MEM_CONFIG0,
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};
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return gpio_pullup_base2_value(pads, ARRAY_SIZE(pads));
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}
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