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mb/google/brya: Fix S0i3 regression 

Keeping the PM timer enabled will disqualify an ADL system from entering
S0i3, and will also cause an increase in power during suspend states.
The PM timer is not required for brya boards, therefore disabling it.
Fixes: 0e905801 (soc/intel: transition full control over PM Timer from
FSP to coreboot)

BUG=b:206922066
TEST=Boot gimble to OS and verify S0i3 counter incrementing after
exiting S0ix suspend states.

Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com>
Change-Id: I8005dacd732c033980ccc479375ff5b06df8dac1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59790
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Meera Ravindranath 2021-12-01 10:12:28 +05:30 committed by Tim Wawrzynczak
parent db925aaf38
commit 1ce0f3aab7
1 changed files with 3 additions and 0 deletions
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3
src/mainboard/google/brya/Kconfig
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@ -157,4 +157,7 @@ config HAVE_WWAN_POWER_SEQUENCE
in variant.h, as well as T1_OFF_MS (time between PERST & RST) and T2_OFF_MS (time in variant.h, as well as T1_OFF_MS (time between PERST & RST) and T2_OFF_MS (time
between RST and FCPO). between RST and FCPO).
config USE_PM_ACPI_TIMER
default n
endif # BOARD_GOOGLE_BASEBOARD_BRYA || BOARD_GOOGLE_BASEBOARD_BRASK endif # BOARD_GOOGLE_BASEBOARD_BRYA || BOARD_GOOGLE_BASEBOARD_BRASK