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soc/intel/skylake: Enable low power S0Idle capability 

This patch sets the ACPI FADT flag ACPI_FADT_LOW_POWER_S0
if S0ix is enabled for the platform.

BUG=b:79559085
TEST= Boot to OS and check the ACPI_FADT_LOW_PWR_IDLE_S0
      flag is set in FACP table - FADT.Flags[21] bit.

Change-Id: I0b8a86118232a66e7466d5b8116eff6087b51210
Signed-off-by: Haridhar Kalvala <haridhar.kalvala@intel.com>
Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@intel.com>
Reviewed-on: https://review.coreboot.org/26940
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Naresh Solanki <naresh.solanki@intel.com>
This commit is contained in:
Haridhar Kalvala 2018-06-07 10:52:31 +05:30 committed by Furquan Shaikh
parent 4ca3a8abfa
commit 1cedc7e40f
1 changed files with 5 additions and 0 deletions
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5
src/soc/intel/skylake/acpi.c
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@ -234,6 +234,8 @@ unsigned long acpi_fill_madt(unsigned long current)
void acpi_fill_fadt(acpi_fadt_t *fadt) void acpi_fill_fadt(acpi_fadt_t *fadt)
{ {
const struct device *dev = SA_DEV_ROOT;
const config_t *config = dev ? dev->chip_info : NULL;
const uint16_t pmbase = ACPI_BASE_ADDRESS; const uint16_t pmbase = ACPI_BASE_ADDRESS;
/* Use ACPI 3.0 revision */ /* Use ACPI 3.0 revision */
@ -282,6 +284,9 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
ACPI_FADT_RESET_REGISTER | ACPI_FADT_SEALED_CASE | ACPI_FADT_RESET_REGISTER | ACPI_FADT_SEALED_CASE |
ACPI_FADT_S4_RTC_WAKE | ACPI_FADT_PLATFORM_CLOCK; ACPI_FADT_S4_RTC_WAKE | ACPI_FADT_PLATFORM_CLOCK;
if (config && config->s0ix_enable)
fadt->flags |= ACPI_FADT_LOW_PWR_IDLE_S0;
fadt->reset_reg.space_id = 1; fadt->reset_reg.space_id = 1;
fadt->reset_reg.bit_width = 8; fadt->reset_reg.bit_width = 8;
fadt->reset_reg.bit_offset = 0; fadt->reset_reg.bit_offset = 0;