diff --git a/src/soc/amd/common/block/lpc/espi_util.c b/src/soc/amd/common/block/lpc/espi_util.c
index 45fcc6f416..c8309a5ceb 100644
--- a/src/soc/amd/common/block/lpc/espi_util.c
+++ b/src/soc/amd/common/block/lpc/espi_util.c
@@ -332,11 +332,34 @@ enum espi_cmd_type {
 #define  ESPI_VW_MAX_SIZE_SHIFT			13
 #define  ESPI_VW_MAX_SIZE_MASK			(0x3f << ESPI_VW_MAX_SIZE_SHIFT)
 
+#define ESPI_GLOBAL_CONTROL_0			0x30
+#define  ESPI_WAIT_CNT_SHIFT			24
+#define  ESPI_WAIT_CNT_MASK			(0x3F << ESPI_WAIT_CNT_SHIFT)
+#define  ESPI_WDG_CNT_SHIFT			8
+#define  ESPI_WDG_CNT_MASK			(0xFFFF << ESPI_WDG_CNT_SHIFT)
+#define  ESPI_AL_IDLE_TIMER_SHIFT		4
+#define  ESPI_AL_IDLE_TIMER_MASK		(0x7 << ESPI_AL_IDLE_TIMER_SHIFT)
+#define  ESPI_AL_STOP_EN			(1 << 3)
+#define  ESPI_PR_CLKGAT_EN			(1 << 2)
+#define  ESPI_WAIT_CHKEN			(1 << 1)
+#define  ESPI_WDG_EN				(1 << 0)
+
 #define ESPI_GLOBAL_CONTROL_1			0x34
+#define  ESPI_RGCMD_INT_MAP_SHIFT		13
+#define  ESPI_RGCMD_INT_MAP_MASK		(0x1F << ESPI_RGCMD_INT_MAP_SHIFT)
+#define    ESPI_RGCMD_INT(irq)			((irq) << ESPI_RGCMD_INT_MAP_SHIFT)
+#define    ESPI_RGCMD_INT_SMI			(0x1F << ESPI_RGCMD_INT_MAP_SHIFT)
+#define  ESPI_ERR_INT_MAP_SHIFT			8
+#define  ESPI_ERR_INT_MAP_MASK			(0x1F << ESPI_ERR_INT_MAP_SHIFT)
+#define    ESPI_ERR_INT(irq)			((irq) << ESPI_ERR_INT_MAP_SHIFT)
+#define    ESPI_ERR_INT_SMI			(0x1F << ESPI_ERR_INT_MAP_SHIFT)
 #define  ESPI_SUB_DECODE_SLV_SHIFT		3
 #define  ESPI_SUB_DECODE_SLV_MASK		(0x3 << ESPI_SUB_DECODE_SLV_SHIFT)
 #define  ESPI_SUB_DECODE_EN			(1 << 2)
+#define  ESPI_BUS_MASTER_EN			(1 << 1)
+#define  ESPI_SW_RST				(1 << 0)
 
+#define ESPI_SLAVE0_INT_EN			0x6C
 #define ESPI_SLAVE0_INT_STS			0x70
 #define  ESPI_STATUS_DNCMD_COMPLETE		(1 << 28)
 #define  ESPI_STATUS_NON_FATAL_ERROR		(1 << 6)