soc/intel/apollolake: Indent code using tabs

Fix the following error and warnings detected by checkpatch.pl:

ERROR: code indent should use tabs where possible
WARNING: please, no spaces at the start of a line
WARNING: please, no space before tabs

TEST=Build for reef

Change-Id: Id7a758463b95274c5e8bbdd67da0955f1ae78aac
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18721
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

src/soc/intel/apollolake/chip.c

@@ -129,7 +129,7 @@ struct pci_operations soc_pci_ops = {
 
 static void pci_domain_set_resources(device_t dev)
 {
-       assign_resources(dev->link_list);
+	assign_resources(dev->link_list);
 }
 
 static struct device_operations pci_domain_ops = {
@@ -448,7 +448,7 @@ static void parse_devicetree(FSP_S_CONFIG *silconfig)
 
 void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd)
 {
-        FSP_S_CONFIG *silconfig = &silupd->FspsConfig;
+	FSP_S_CONFIG *silconfig = &silupd->FspsConfig;
 	static struct soc_intel_apollolake_config *cfg;
 	uint8_t port;
 

src/soc/intel/apollolake/elog.c

@@ -56,8 +56,8 @@ static void pch_log_wake_source(struct chipset_power_state *ps)
 	if (ps->gpe0_sts[GPE0_A] & SMB_WAK_STS)
 		elog_add_event_wake(ELOG_WAKE_SOURCE_SMBUS, 0);
 
-        /* ACPI Wake Event - Always Log prev_sleep_state*/
+	/* ACPI Wake Event - Always Log prev_sleep_state*/
-        elog_add_event_byte(ELOG_TYPE_ACPI_WAKE, ps->prev_sleep_state);
+	elog_add_event_byte(ELOG_TYPE_ACPI_WAKE, ps->prev_sleep_state);
 
 	/* Log GPIO events in set A-D */
 	pch_log_gpio_gpe(ps->gpe0_sts[GPE0_A], ps->gpe0_en[GPE0_A], 0);

src/soc/intel/apollolake/flash_ctrlr.c

@@ -190,7 +190,7 @@ unsigned int spi_crop_chunk(unsigned int cmd_len, unsigned int buf_len)
 /*
  * Write-protection status for BIOS region (BIOS_CONTROL register):
  * EISS/WPD bits	00	01	10	11
- * 			--	--	--	--
+ *			--	--	--	--
  * normal mode		RO	RW	RO	RO
  * SMM mode		RO	RW	RO	RW
  */

src/soc/intel/apollolake/include/soc/pm.h

@@ -34,8 +34,8 @@
 #define PM1_EN			0x02
 #define   PCIEXPWAK_DIS		(1 << 14)
 #define   RTC_EN		(1 << 10)
-#define   PWRBTN_EN     	(1 << 8)
+#define   PWRBTN_EN		(1 << 8)
-#define   GBL_EN        	(1 << 5)
+#define   GBL_EN		(1 << 5)
 
 #define PM1_CNT			0x04
 #define   SCI_EN		(1 << 0)

src/soc/intel/apollolake/tsc_freq.c

@@ -25,8 +25,8 @@
 
 unsigned long tsc_freq_mhz(void)
 {
-    msr_t msr = rdmsr(MSR_PLATFORM_INFO);
+	msr_t msr = rdmsr(MSR_PLATFORM_INFO);
-    return (BASE_CLOCK_MHZ * ((msr.lo >> 8) & 0xff));
+	return (BASE_CLOCK_MHZ * ((msr.lo >> 8) & 0xff));
 }
 
 void set_max_freq(void)