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sb/intel/common: Remove the SOUTHBRIDGE_INTEL_COMMON Kconfig symbol 

All code in southbridge/intel/common is now properly guarded by a
Kconfig symbol, making SOUTHBRIDGE_INTEL_COMMON obsolete.

Change-Id: Ifeccfaa9534f903e3f3543e1f9f3d5f3345b461e
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36438
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Arthur Heymans 2019-10-29 18:33:30 +01:00 committed by Nico Huber
parent 23a6c79126
commit 1d4bdda47f
12 changed files with 0 additions and 21 deletions
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1
src/soc/intel/fsp_broadwell_de/Kconfig
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@ -12,7 +12,6 @@ config CPU_SPECIFIC_OPTIONS
select ARCH_VERSTAGE_X86_32 select ARCH_VERSTAGE_X86_32
select ARCH_ROMSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32
select ARCH_RAMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32
select SOUTHBRIDGE_INTEL_COMMON
select SOUTHBRIDGE_INTEL_COMMON_SPI select SOUTHBRIDGE_INTEL_COMMON_SPI
select SOUTHBRIDGE_INTEL_COMMON_RESET select SOUTHBRIDGE_INTEL_COMMON_RESET
select SOUTHBRIDGE_INTEL_COMMON_RTC select SOUTHBRIDGE_INTEL_COMMON_RTC

1
src/southbridge/intel/bd82x6x/Kconfig
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@ -24,7 +24,6 @@ if SOUTHBRIDGE_INTEL_BD82X6X || SOUTHBRIDGE_INTEL_C216
config SOUTH_BRIDGE_OPTIONS # dummy config SOUTH_BRIDGE_OPTIONS # dummy
def_bool y def_bool y
select ACPI_INTEL_HARDWARE_SLEEP_VALUES select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select SOUTHBRIDGE_INTEL_COMMON
select SOUTHBRIDGE_INTEL_COMMON_FINALIZE select SOUTHBRIDGE_INTEL_COMMON_FINALIZE
select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ
select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_SMBUS

7
src/southbridge/intel/common/Kconfig
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@ -1,22 +1,16 @@
config SOUTHBRIDGE_INTEL_COMMON
def_bool n
config SOUTHBRIDGE_INTEL_COMMON_RESET config SOUTHBRIDGE_INTEL_COMMON_RESET
def_bool n def_bool n
select HAVE_CF9_RESET select HAVE_CF9_RESET
config SOUTHBRIDGE_INTEL_COMMON_RTC config SOUTHBRIDGE_INTEL_COMMON_RTC
def_bool n def_bool n
depends on SOUTHBRIDGE_INTEL_COMMON
config SOUTHBRIDGE_INTEL_COMMON_PMCLIB config SOUTHBRIDGE_INTEL_COMMON_PMCLIB
def_bool n def_bool n
depends on SOUTHBRIDGE_INTEL_COMMON
depends on SOUTHBRIDGE_INTEL_COMMON_PMBASE depends on SOUTHBRIDGE_INTEL_COMMON_PMBASE
config SOUTHBRIDGE_INTEL_COMMON_PMBASE config SOUTHBRIDGE_INTEL_COMMON_PMBASE
def_bool n def_bool n
depends on SOUTHBRIDGE_INTEL_COMMON
config SOUTHBRIDGE_INTEL_COMMON_GPIO config SOUTHBRIDGE_INTEL_COMMON_GPIO
def_bool n def_bool n
@ -86,7 +80,6 @@ config INTEL_CHIPSET_LOCKDOWN
config SOUTHBRIDGE_INTEL_COMMON_WATCHDOG config SOUTHBRIDGE_INTEL_COMMON_WATCHDOG
bool bool
depends on SOUTHBRIDGE_INTEL_COMMON
depends on SOUTHBRIDGE_INTEL_COMMON_PMBASE depends on SOUTHBRIDGE_INTEL_COMMON_PMBASE
if SOUTHBRIDGE_INTEL_COMMON_FINALIZE if SOUTHBRIDGE_INTEL_COMMON_FINALIZE

4
src/southbridge/intel/common/Makefile.inc
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@ -25,8 +25,6 @@ romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB) += pmclib.c
ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG) += watchdog.c ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG) += watchdog.c
ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_COMMON),y)
all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE) += pmbase.c all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE) += pmbase.c
smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE) += pmbase.c smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE) += pmbase.c
@ -54,5 +52,3 @@ ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT) += madt.c
smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE) += finalize.c smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE) += finalize.c
all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC) += rtc.c all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC) += rtc.c
endif

1
src/southbridge/intel/fsp_rangeley/Kconfig
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@ -29,7 +29,6 @@ config SOUTH_BRIDGE_OPTIONS # dummy
select PCIEXP_COMMON_CLOCK select PCIEXP_COMMON_CLOCK
select SPI_FLASH select SPI_FLASH
select INTEL_DESCRIPTOR_MODE_CAPABLE select INTEL_DESCRIPTOR_MODE_CAPABLE
select SOUTHBRIDGE_INTEL_COMMON
select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_SMBUS
select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG
select SOUTHBRIDGE_INTEL_COMMON_PMBASE select SOUTHBRIDGE_INTEL_COMMON_PMBASE

1
src/southbridge/intel/i82371eb/Kconfig
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@ -1,6 +1,5 @@
config SOUTHBRIDGE_INTEL_I82371EB config SOUTHBRIDGE_INTEL_I82371EB
select ACPI_INTEL_HARDWARE_SLEEP_VALUES select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select SOUTHBRIDGE_INTEL_COMMON
select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_SMBUS
select SOUTHBRIDGE_INTEL_COMMON_RTC select SOUTHBRIDGE_INTEL_COMMON_RTC
select SOUTHBRIDGE_INTEL_COMMON_RESET select SOUTHBRIDGE_INTEL_COMMON_RESET

1
src/southbridge/intel/i82801dx/Kconfig
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@ -20,7 +20,6 @@ config SOUTHBRIDGE_INTEL_I82801DX
select IOAPIC select IOAPIC
select HAVE_SMI_HANDLER select HAVE_SMI_HANDLER
select HAVE_USBDEBUG select HAVE_USBDEBUG
select SOUTHBRIDGE_INTEL_COMMON
select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_SMBUS
select SOUTHBRIDGE_INTEL_COMMON_RTC select SOUTHBRIDGE_INTEL_COMMON_RTC
select SOUTHBRIDGE_INTEL_COMMON_RESET select SOUTHBRIDGE_INTEL_COMMON_RESET

1
src/southbridge/intel/i82801gx/Kconfig
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@ -16,7 +16,6 @@
config SOUTHBRIDGE_INTEL_I82801GX config SOUTHBRIDGE_INTEL_I82801GX
bool bool
select ACPI_INTEL_HARDWARE_SLEEP_VALUES select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select SOUTHBRIDGE_INTEL_COMMON
select IOAPIC select IOAPIC
select HAVE_USBDEBUG select HAVE_USBDEBUG
select USE_WATCHDOG_ON_BOOT select USE_WATCHDOG_ON_BOOT

1
src/southbridge/intel/i82801ix/Kconfig
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@ -16,7 +16,6 @@
config SOUTHBRIDGE_INTEL_I82801IX config SOUTHBRIDGE_INTEL_I82801IX
bool bool
select SOUTHBRIDGE_INTEL_COMMON
select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_SMBUS
select SOUTHBRIDGE_INTEL_COMMON_SPI if !BOARD_EMULATION_QEMU_X86_Q35 select SOUTHBRIDGE_INTEL_COMMON_SPI if !BOARD_EMULATION_QEMU_X86_Q35
select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ

1
src/southbridge/intel/i82801jx/Kconfig
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@ -16,7 +16,6 @@
config SOUTHBRIDGE_INTEL_I82801JX config SOUTHBRIDGE_INTEL_I82801JX
bool bool
select SOUTHBRIDGE_INTEL_COMMON
select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_SMBUS
select SOUTHBRIDGE_INTEL_COMMON_SPI select SOUTHBRIDGE_INTEL_COMMON_SPI
select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ

1
src/southbridge/intel/ibexpeak/Kconfig
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@ -27,7 +27,6 @@ config SOUTH_BRIDGE_OPTIONS # dummy
select USE_WATCHDOG_ON_BOOT select USE_WATCHDOG_ON_BOOT
select PCIEXP_ASPM select PCIEXP_ASPM
select PCIEXP_COMMON_CLOCK select PCIEXP_COMMON_CLOCK
select SOUTHBRIDGE_INTEL_COMMON
select SOUTHBRIDGE_INTEL_COMMON_FINALIZE select SOUTHBRIDGE_INTEL_COMMON_FINALIZE
select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ
select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_SMBUS

1
src/southbridge/intel/lynxpoint/Kconfig
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@ -21,7 +21,6 @@ if SOUTHBRIDGE_INTEL_LYNXPOINT
config SOUTH_BRIDGE_OPTIONS # dummy config SOUTH_BRIDGE_OPTIONS # dummy
def_bool y def_bool y
select ACPI_INTEL_HARDWARE_SLEEP_VALUES select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select SOUTHBRIDGE_INTEL_COMMON
select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_SMBUS
select SOUTHBRIDGE_INTEL_COMMON_SPI select SOUTHBRIDGE_INTEL_COMMON_SPI
select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT