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sb/intel/bd82x6x/bootblock: Use register name 

Use defines instead of magic values.

No functional change.

Change-Id: Idc90f254d7713f96a6e8b0389e34d860f461d9d1
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/19546
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
This commit is contained in:
Patrick Rudolph 2017-05-03 18:00:25 +02:00 committed by Martin Roth
parent c368620d60
commit 1d64e26e12
1 changed files with 4 additions and 6 deletions
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10
src/southbridge/intel/bd82x6x/bootblock.c
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@ -34,19 +34,17 @@ static void store_initial_timestamp(void)
static void enable_spi_prefetch(void)
{
u8 reg8;
pci_devfn_t dev;
pci_devfn_t dev = PCH_LPC_DEV;
dev = PCI_DEV(0, 0x1f, 0);
reg8 = pci_read_config8(dev, 0xdc);
reg8 = pci_read_config8(dev, BIOS_CNTL);
reg8 &= ~(3 << 2);
reg8 |= (2 << 2); /* Prefetching and Caching Enabled */
pci_write_config8(dev, 0xdc, reg8);
pci_write_config8(dev, BIOS_CNTL, reg8);
}
static void enable_port80_on_lpc(void)
{
pci_devfn_t dev = PCI_DEV(0, 0x1f, 0);
pci_devfn_t dev = PCH_LPC_DEV;
/* Enable port 80 POST on LPC */
pci_write_config32(dev, RCBA, (uintptr_t)DEFAULT_RCBA | 1);