mb/google/octopus/var/fleex: Add RTL5682 support
Fleex will use SSFC to support RTL5682. BUG=b:178653122 TEST=abuild Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: Icb06eabe297c5562bd2171b52cc9671c342e6dfd Reviewed-on: https://review.coreboot.org/c/coreboot/+/51423 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marco Chen <marcochen@google.com>
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@ -28,6 +28,7 @@ config BOARD_GOOGLE_FLEEX
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select BASEBOARD_OCTOPUS_LAPTOP
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select BOARD_GOOGLE_BASEBOARD_OCTOPUS
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select NHLT_DA7219 if INCLUDE_NHLT_BLOBS
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select NHLT_RT5682 if INCLUDE_NHLT_BLOBS
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config BOARD_GOOGLE_BOBBA
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bool "-> Bobba"
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@ -14,13 +14,15 @@ static const struct pad_config default_override_table[] = {
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/* PCIE_WAKE1_B -- FULL_CARD_POWER_OFF */
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PAD_CFG_GPO(GPIO_117, 1, PWROK),
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/* GPIO_137 -- HP_INT_ODL and would be amend by SSFC. */
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PAD_CFG_GPI_APIC_IOS(GPIO_137, NONE, DEEP, LEVEL, INVERT, HIZCRx1, DISPUPD),
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PAD_NC(GPIO_143, UP_20K),
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PAD_NC(GPIO_144, UP_20K),
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PAD_NC(GPIO_145, UP_20K),
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/* EN_PP3300_TOUCHSCREEN */
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PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_146, 0, DEEP, NONE, Tx0RxDCRx0,
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DISPUPD),
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PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_146, 0, DEEP, NONE, Tx0RxDCRx0, DISPUPD),
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/* AVS_I2S1_MCLK -- PLT_RST_LTE_L */
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PAD_CFG_GPO(GPIO_161, 1, DEEP),
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@ -122,6 +122,19 @@ chip soc/intel/apollolake
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register "mic_amp_in_sel" = ""diff""
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device i2c 1a on end
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end
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chip drivers/i2c/generic
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register "hid" = ""10EC5682""
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register "name" = ""RT58""
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register "desc" = ""Realtek RT5682""
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register "irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_137_IRQ)"
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register "probed" = "1"
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register "property_count" = "1"
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# Set the jd_src to RT5668_JD1 for jack detection
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register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
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register "property_list[0].name" = ""realtek,jd-src""
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register "property_list[0].integer" = "1"
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device i2c 1a on end
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end
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end # - I2C 5
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device pci 17.2 on
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chip drivers/i2c/generic
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