mb/google/puff: Add SOF chip driver

Add SOF chip driver entries for all variants, so that the correct audio
config is passed to the OS drivers.

TEST=build, boot Windows on wyvern variant, verify headphone output
and microphone functional under Windows using coolstar's SOF drivers.

Change-Id: I421c070eac321c2fc160b8f26868bcb1ec13001e
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74815
Reviewed-by: CoolStar <coolstarorganization@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
This commit is contained in:
Matt DeVillier 2023-01-17 12:25:45 -06:00 committed by Matt DeVillier
parent 8e883c11b4
commit 1d8763806c
3 changed files with 15 additions and 1 deletions

View File

@ -1,6 +1,7 @@
config BOARD_GOOGLE_BASEBOARD_PUFF
def_bool n
select BOARD_ROMSIZE_KB_16384 if !BOARD_ROMSIZE_KB_32768
select DRIVERS_AUDIO_SOF
select DRIVERS_GENERIC_GPIO_KEYS
select DRIVERS_GENERIC_MAX98357A
select DRIVERS_I2C_DA7219

View File

@ -345,7 +345,12 @@ chip soc/intel/cannonlake
end # eSPI Interface
device pci 1f.1 on end # P2SB
device pci 1f.2 hidden end # Power Management Controller
device pci 1f.3 on end # Intel HDA
device pci 1f.3 on
chip drivers/sof
register "jack_tplg" = "rt5682"
device generic 0 on end
end
end # Intel HDA
device pci 1f.4 on end # SMBus
device pci 1f.5 on end # PCH SPI
device pci 1f.6 off end # GbE

View File

@ -388,6 +388,14 @@ chip soc/intel/cannonlake
register "PcieRpSlotImplemented[10]" = "1"
end
device pci 1e.3 off end # GSPI #1
device pci 1f.3 on
chip drivers/sof
register "spkr_tplg" = "rt1015"
register "jack_tplg" = "rt5682"
register "mic_tplg" = "_2ch_pdm0"
device generic 0 on end
end
end # Intel HDA
end
# VR Settings Configuration for 4 Domains