hp/pavilion_m6_1035dx: Sanitize #includes

There were a number of things wrong with the includes. First, The
includes did not use paths to AGESA files, thus relying on the
compiler include paths to find the correct file. This made it unclear
where the file included was located, and whether it was local, under
vendorcode, or under a different directory. Instead, use full paths
for each non-local include.

Second, the local includes were mixed with the rest, making it unclear
which file is local and which one is not. Keep the local includes at
the top. This also prevents us from polluting the namespace of local
headers, with library definitions, and allows us to catch if we missed
an otherwise needed external header.

Thirdly, alphabetize the order of includes where possible.

Change-Id: I22c543291beabb83c16d912ea0a490be6ca4e03c
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/5412
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Alexandru Gagniuc 2014-03-28 14:48:13 -05:00
parent cb3ba5fdbc
commit 1d87dac4e4
12 changed files with 78 additions and 109 deletions

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@ -18,16 +18,12 @@
*/
#include "agesawrapper.h"
#include "amdlib.h"
#include "BiosCallOuts.h"
#include "Ids.h"
#include "OptionsIds.h"
#include "heapManager.h"
#include "FchPlatform.h"
#include "cbfs.h"
#if IS_ENABLED(CONFIG_HUDSON_IMC_FWM)
#include "imc.h"
#endif
#include <cbfs.h>
#include <southbridge/amd/agesa/hudson/imc.h>
#include <vendorcode/amd/agesa/f15tn/Proc/Fch/FchPlatform.h>
STATIC CONST BIOS_CALLOUT_STRUCT BiosCallouts[] =
{

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@ -17,12 +17,9 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include "AGESA.h"
#include "amdlib.h"
#include "Ids.h"
#include "heapManager.h"
#include "PlatformGnbPcieComplex.h"
#include "Filecode.h"
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE

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@ -20,9 +20,8 @@
#ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
#define _PLATFORM_GNB_PCIE_COMPLEX_H
#include "Porting.h"
#include "AGESA.h"
#include "amdlib.h"
#include <vendorcode/amd/agesa/f15tn/AGESA.h>
#include <vendorcode/amd/agesa/f15tn/Lib/amdlib.h>
VOID
OemCustomizeInitEarly (

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@ -17,19 +17,16 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include <string.h>
#include "agesawrapper.h"
#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <arch/ioapic.h>
#include <cpu/amd/amdfam15.h>
#include <console/console.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/x86/msr.h>
#include "agesawrapper.h"
#include <cpu/amd/mtrr.h>
#include <cpu/amd/amdfam15.h>
#include "agesawrapper.h"
#include <string.h>
#define DUMP_ACPI_TABLES 0

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@ -22,30 +22,22 @@
*----------------------------------------------------------------------------------------
*/
#include <stdint.h>
#include <string.h>
#include <cpu/x86/mtrr.h>
#include "agesawrapper.h"
#include "BiosCallOuts.h"
#include "cpuRegisters.h"
#include "cpuCacheInit.h"
#include "cpuApicUtilities.h"
#include "cpuEarlyInit.h"
#include "cpuLateInit.h"
#include "Dispatcher.h"
#include "cpuCacheInit.h"
#include "amdlib.h"
#include "PlatformGnbPcieComplex.h"
#include "Filecode.h"
#include "heapManager.h"
#include "FchPlatform.h"
#include "Fch.h"
#include <cpu/amd/agesa/s3_resume.h>
#include <cbmem.h>
#include <arch/acpi.h>
#include <arch/io.h>
#include <cbmem.h>
#include <cpu/x86/mtrr.h>
#include <device/device.h>
#include "hudson.h"
#include <string.h>
#include <stdint.h>
#include <cpu/amd/agesa/s3_resume.h>
#include <southbridge/amd/agesa/hudson/hudson.h>
#include <vendorcode/amd/agesa/f15tn/Proc/Fch/FchPlatform.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
VOID FchInitS3LateRestore (IN FCH_DATA_BLOCK *FchDataPtr);
VOID FchInitS3EarlyRestore (IN FCH_DATA_BLOCK *FchDataPtr);

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@ -26,8 +26,7 @@
#define _AGESAWRAPPER_H_
#include <stdint.h>
#include "Porting.h"
#include "AGESA.h"
#include <vendorcode/amd/agesa/f15tn/AGESA.h>
/*----------------------------------------------------------------------------------------
* D E F I N I T I O N S A N D M A C R O S

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@ -33,9 +33,21 @@
* @e \$Revision: 23714 $ @e \$Date: 2009-12-09 17:28:37 -0600 (Wed, 09 Dec 2009) $
*/
#include "AGESA.h"
//#include "CommonReturns.h"
#include "Filecode.h"
#include <vendorcode/amd/agesa/f15tn/AGESA.h>
/* Include the files that instantiate the configuration definitions. */
#include <vendorcode/amd/agesa/f15tn/Include/AdvancedApi.h>
#include <vendorcode/amd/agesa/f15tn/Include/CommonReturns.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/cpuFamilyTranslation.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatures.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
/* AGESA nonesense: the next two headers depend on heapManager.h */
#include <vendorcode/amd/agesa/f15tn/Proc/Common/CreateStruct.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/cpuEarlyInit.h>
/* These tables are optional and may be used to adjust memory timing settings */
#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mm.h>
#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h>
#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
/* Select the cpu family. */
@ -250,22 +262,6 @@ CONST AP_MTRR_SETTINGS ROMDATA TrinityApMtrrSettingsList[] =
#define BLDCFG_AP_MTRR_SETTINGS_LIST &TrinityApMtrrSettingsList
//#include "VirgoInstall.h"
/* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h"
#include "cpuFamRegisters.h"
#include "cpuFamilyTranslation.h"
#include "AdvancedApi.h"
#include "heapManager.h"
#include "CreateStruct.h"
#include "cpuFeatures.h"
#include "Table.h"
#include "CommonReturns.h"
#include "cpuEarlyInit.h"
#include "cpuLateInit.h"
#include "GnbInterface.h"
// This is the delivery package title, "BrazosPI"
// This string MUST be exactly 8 characters long
#define AGESA_PACKAGE_STRING {'c', 'b', '_', 'A', 'g', 'e', 's', 'a'}
@ -363,7 +359,8 @@ GPIO_CONTROL parmer_gpio[] = {
#define DFLT_MEMORY_QUADRANK_TYPE QUADRANK_UNBUFFERED
#define DFLT_VRM_SLEW_RATE (5000)
#include "PlatformInstall.h"
/* AGESA nonsense: this header depends on the definitions above */
#include <vendorcode/amd/agesa/f15tn/Include/PlatformInstall.h>
/*----------------------------------------------------------------------------------------
* CUSTOMER OVERIDES MEMORY TABLE
@ -447,12 +444,6 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = {
PSO_END
};
/*
* These tables are optional and may be used to adjust memory timing settings
*/
#include "mm.h"
#include "mn.h"
// Customer table
UINT8 AGESA_MEM_TABLE_TN[][sizeof (MEM_TABLE_ALIAS)] =
{

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@ -17,17 +17,16 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include "agesawrapper.h"
#include <console/console.h>
#include <cpu/amd/amdfam15.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <string.h>
#include <stdint.h>
#include <stdlib.h>
#include <cpu/amd/amdfam14.h>
#include "agesawrapper.h"
#if IS_ENABLED(CONFIG_HUDSON_IMC_FWM)
#include "imc.h"
#endif
#include <string.h>
#include <southbridge/amd/agesa/hudson/imc.h>
/* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default.

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@ -17,12 +17,11 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include <device/pci.h>
#include <string.h>
#include <stdint.h>
#include <arch/pirq_routing.h>
#include <cpu/amd/amdfam15.h>
#include <console/console.h>
#include <string.h>
#include <stdint.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,

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@ -17,17 +17,17 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include "agesawrapper.h"
#include "BiosCallOuts.h"
#include <arch/acpi.h>
#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/agesa/s3_resume.h>
#include <device/device.h>
#include <device/pci.h>
#include <arch/io.h>
#include <cpu/x86/msr.h>
#include "BiosCallOuts.h"
#include <cpu/amd/mtrr.h>
#include <device/pci_def.h>
#include <arch/acpi.h>
#include <cpu/amd/agesa/s3_resume.h>
#include "agesawrapper.h"
/*************************************************
* enable the dedicated function in parmer board.

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@ -17,16 +17,16 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
#include <arch/io.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam15.h>
#include <arch/cpu.h>
#include <arch/io.h>
#include <arch/smp/mpspec.h>
#include <console/console.h>
#include <cpu/amd/amdfam15.h>
#include <cpu/x86/lapic.h>
#include "southbridge/amd/agesa/hudson/hudson.h" /* pm_ioread() */
#include <device/pci.h>
#include <stdint.h>
#include <string.h>
#include <southbridge/amd/agesa/hudson/hudson.h> /* pm_ioread() */
//-#define IO_APIC_ID CONFIG_MAX_PHYSICAL_CPUS + 1
#define IO_APIC_ID CONFIG_MAX_CPUS

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@ -17,25 +17,25 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include "agesawrapper.h"
#include <arch/cpu.h>
#include <arch/io.h>
#include <arch/stages.h>
#include <device/pnp_def.h>
#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <cbmem.h>
#include <console/console.h>
#include <console/loglevel.h>
#include "agesawrapper.h"
#include "cpu/x86/bist.h"
#include "cpu/x86/lapic.h"
#include "southbridge/amd/agesa/hudson/hudson.h"
#include "cpu/amd/agesa/s3_resume.h"
#include <cpu/amd/agesa/s3_resume.h>
#include <cpu/x86/bist.h>
#include <cpu/x86/lapic.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <stdint.h>
#include <string.h>
#include <southbridge/amd/agesa/hudson/hudson.h>
#include "src/drivers/pc80/i8254.c"
#include "src/drivers/pc80/i8259.c"
#include "cbmem.h"
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
void disable_cache_as_ram(void);