cpu/x86/msr: introduce helpers msr_read, msr_write

The existing helpers for reading/writing MSRs (rdmsr, wrmsr) require use
of the struct `msr_t`, which splits the MSR value into two 32 bit parts.
In many cases, where simple 32 bit or 64 bit values are written, this
bloats the code by unnecessarly having to use that struct.

Thus, introduce the helpers `msr_read` and `msr_write`, which take or
return `uint64_t` values, so the code condenses to a single line or two,
without having to deal with `msr_t`.

Example 1:

~~~
msr_t msr = {
  .lo = read32((void *)(uintptr_t)0xfed30880),
  .hi = 0,
};

msr.lo |= 1;
wrmsr(0x123, msr);
~~~

becomes

~~~
uint32_t foo = read32((void *)(uintptr_t)0xfed30880);
msr_write(0x123, foo | 1)
~~~

Example 2:

~~~
msr_t msr = rdmsr(0xff);
uint64_t msr_val = (msr.hi << 32) | msr.lo;
~~~

becomes

~~~
uint64_t msr_val = msr_read(0xff);
~~~

Change-Id: I27333a4bdfe3c8cebfe49a16a4f1a066f558c4ce
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52548
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Michael Niewöhner 2021-04-20 18:51:42 +02:00 committed by Patrick Georgi
parent 3f36a8c7e1
commit 1d9f8b0c42
1 changed files with 26 additions and 0 deletions

View File

@ -300,6 +300,32 @@ static inline enum mca_err_code_types mca_err_type(msr_t reg)
return MCA_ERRTYPE_UNKNOWN;
}
/**
* Helper for reading a MSR
*
* @param[in] reg The MSR.
*/
static inline uint64_t msr_read(unsigned int reg)
{
msr_t msr = rdmsr(reg);
return (((uint64_t)msr.hi << 32) | msr.lo);
}
/**
* Helper for writing a MSR
*
* @param[in] reg The MSR.
* @param[in] value The value to be written to the MSR.
*/
static inline void msr_write(unsigned int reg, uint64_t value)
{
msr_t msr = {
.lo = (unsigned int)value,
.hi = (unsigned int)(value >> 32)
};
wrmsr(reg, msr);
}
/**
* Helper for (un)setting MSR bitmasks
*