diff --git a/src/soc/intel/alderlake/Makefile.inc b/src/soc/intel/alderlake/Makefile.inc
index 886d532e60..f9a7c724ce 100644
--- a/src/soc/intel/alderlake/Makefile.inc
+++ b/src/soc/intel/alderlake/Makefile.inc
@@ -73,9 +73,7 @@ CPPFLAGS_common += -I$(src)/soc/intel/alderlake/include
 ifeq ($(CONFIG_SOC_INTEL_ALDERLAKE_PCH_S),y)
 # 06-97-00, 06-97-01, 06-97-04 are ADL-S Engineering Samples
 # 06-97-02 are ADL-S/HX Quality Samples but also ADL-HX Engineering Samples
-# ADL-S/HX C0
-cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-97-02
-# ADL-S H0
+# ADL-S/HX C0 and ADL-S H0
 cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-97-05
 # RPL-S/HX B0
 cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-b7-01
@@ -83,9 +81,7 @@ else
 ifneq ($(CONFIG_SOC_INTEL_ALDERLAKE_PCH_N),y)
 # 06-9a-00, 06-9a-01 are ADL-P/ADL-M Engineering Samples
 # Missing 06-9a-02 ADL-P K0
-# ADL-P L0
-cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9a-03
-# ADL-P R0 and ADL-M R0
+# ADL-P L0, ADL-P R0 and ADL-M R0
 cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9a-04
 # RPL-P/H J0, RPL-U Q0
 cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-ba-02