From 1dbf31014f0730962e80cf99f8173070191cb36f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sat, 3 Aug 2019 21:28:40 +0300 Subject: [PATCH] amd/stoneyridge: Rename ramtop.c to memmap.c MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use a name consistent with the more recent soc/intel. Change-Id: I4d67a7c3107758c81a67e1668875767beccfcdb0 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/34879 Tested-by: build bot (Jenkins) Reviewed-by: Richard Spiegel Reviewed-by: Marshall Dawson --- src/soc/amd/stoneyridge/Makefile.inc | 6 +++--- src/soc/amd/stoneyridge/{ramtop.c => memmap.c} | 0 2 files changed, 3 insertions(+), 3 deletions(-) rename src/soc/amd/stoneyridge/{ramtop.c => memmap.c} (100%) diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 150df3abd9..0fed074523 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -62,7 +62,7 @@ romstage-y += pmutil.c romstage-y += reset.c romstage-y += smbus.c romstage-y += smbus_spd.c -romstage-y += ramtop.c +romstage-y += memmap.c romstage-$(CONFIG_STONEYRIDGE_UART) += uart.c romstage-y += tsc_freq.c romstage-y += southbridge.c @@ -82,7 +82,7 @@ verstage-$(CONFIG_SPI_FLASH) += spi.c postcar-y += monotonic_timer.c postcar-$(CONFIG_STONEYRIDGE_UART) += uart.c -postcar-y += ramtop.c +postcar-y += memmap.c postcar-y += nb_util.c postcar-$(CONFIG_VBOOT_MEASURED_BOOT) += i2c.c postcar-y += tsc_freq.c @@ -103,7 +103,7 @@ ramstage-y += reset.c ramstage-y += sata.c ramstage-y += sm.c ramstage-y += smbus.c -ramstage-y += ramtop.c +ramstage-y += memmap.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c ramstage-$(CONFIG_STONEYRIDGE_UART) += uart.c diff --git a/src/soc/amd/stoneyridge/ramtop.c b/src/soc/amd/stoneyridge/memmap.c similarity index 100% rename from src/soc/amd/stoneyridge/ramtop.c rename to src/soc/amd/stoneyridge/memmap.c