soc/intel/{cnl, icl}: Update the DCACHE_BSP_STACK_SIZE to 129KiB

The current DCACHE_BSP_STACK_SIZE is set to 128KiB for CML & ICL when
FSP uses the same stack provided by coreboot. This patch updates it to
129KiB since the default value of DCACHE_BSP_STACK_SIZE must be
the sum of FSP-M stack requirement (128KiB) and CB romstage
stack requirement (~1KiB).

BUG=b:140268415
TEST=Build and boot CML-Hatch.

Change-Id: Icedff8b42e86dc095fb68deb0b8f80b2667cfeda
Signed-off-by: V Sowmya <v.sowmya@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36032
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
V Sowmya 2019-10-14 14:42:34 +05:30 committed by Subrata Banik
parent fabc0733e9
commit 1dcc170215
2 changed files with 6 additions and 4 deletions

View File

@ -120,11 +120,12 @@ config DCACHE_RAM_SIZE
config DCACHE_BSP_STACK_SIZE config DCACHE_BSP_STACK_SIZE
hex hex
default 0x20000 if FSP_USES_CB_STACK default 0x20400 if FSP_USES_CB_STACK
default 0x4000 default 0x4000
help help
The amount of anticipated stack usage in CAR by bootblock and The amount of anticipated stack usage in CAR by bootblock and
other stages. other stages. In the case of FSP_USES_CB_STACK default value will be
sum of FSP-M stack requirement (128KiB) and CB romstage stack requirement (~1KiB).
config FSP_TEMP_RAM_SIZE config FSP_TEMP_RAM_SIZE
hex hex

View File

@ -70,11 +70,12 @@ config DCACHE_RAM_SIZE
config DCACHE_BSP_STACK_SIZE config DCACHE_BSP_STACK_SIZE
hex hex
default 0x20000 if FSP_USES_CB_STACK default 0x20400 if FSP_USES_CB_STACK
default 0x4000 default 0x4000
help help
The amount of anticipated stack usage in CAR by bootblock and The amount of anticipated stack usage in CAR by bootblock and
other stages. other stages. In the case of FSP_USES_CB_STACK default value will be
sum of FSP-M stack requirement (128KiB) and CB romstage stack requirement (~1KiB).
config FSP_TEMP_RAM_SIZE config FSP_TEMP_RAM_SIZE
hex hex