GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Fix some issues with new "reference" toolchain 

Unfortunately the reference tool chain was updated
without ever even testing it on an abuild run. This
broke a number of ports.

This change gets coreboot at least compiling again
for all supported systems.

Change-Id: I92c7cbc834de6d792fdab86b75df339e2874c52e
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1670
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
This commit is contained in:
Stefan Reinauer 2012-11-02 17:26:33 +01:00
parent 335ad93965
commit 1e0ddf6f1f
3 changed files with 3 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/northbridge/intel/e7505/raminit.c
View File

@ -936,7 +936,7 @@ static void configure_e7501_ram_addresses(const struct mem_controller
*
* NOTE: All cache and stack is lost during ECC scrub loop.
*/
static void __attribute__((always_inline))
static inline void __attribute__((always_inline))
initialize_ecc(unsigned long ret_addr, unsigned long ret_addr2)
{
uint16_t scrubbed = pci_read_config16(MCHDEV, MCHCFGNS) & 0x08;

2
src/southbridge/nvidia/ck804/nic.c
View File

@ -29,7 +29,7 @@
static void nic_init(struct device *dev)
{
u32 dword, old, mac_h, mac_l;
u32 dword, old, mac_h = 0, mac_l = 0;
int eeprom_valid = 0;
struct southbridge_nvidia_ck804_config *conf;
static u32 nic_index = 0;

2
src/southbridge/nvidia/mcp55/nic.c
View File

@ -103,7 +103,7 @@ static void phy_detect(u32 base)
static void nic_init(struct device *dev)
{
u32 mac_h, mac_l, base;
u32 mac_h = 0, mac_l = 0, base;
int eeprom_valid = 0;
struct southbridge_nvidia_mcp55_config *conf;
static u32 nic_index = 0;