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mb/google/brya/anahera: Add new memory support 

Add the new memory support:
Hynix H54G46CYRBX267
Samsung K4U6E3S4AB-MGCL
Hynix  H54G56CYRBX247
Samsung K4UBE3D4AB-MGCL

BUG=b:212328327
TEST=FW_NAME=anahera emerge-brya coreboot

Change-Id: Ib08a1348333accdbb7551ef428d8d130b621dd9f
Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60411
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Wisley Chen 2021-12-28 09:32:01 +06:00 committed by Felix Held
parent 6feb70ec04
commit 1e0fd0b7bd
6 changed files with 24 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
src/mainboard/google/brya/variants/anahera/memory/Makefile.inc
View File

@ -1,11 +1,11 @@
# SPDX-License-Identifier: GPL-2.0-or-later
# This is an auto-generated file. Do not edit!!
# Generated by:
# util/spd_tools/bin/part_id_gen ADL lp4x src/mainboard/google/brya/variants/anahera/memory src/mainboard/google/brya/variants/anahera/memory/mem_parts_used.txt
# ./util/spd_tools/lp4x/part_id_gen ADL lp4x src/mainboard/google/brya/variants/anahera/memory src/mainboard/google/brya/variants/anahera/memory/mem_parts_used.txt
SPD_SOURCES =
SPD_SOURCES += spd/lp4x/set-0/spd-4.hex # ID = 0(0b0000) Parts = MT53E1G32D2NP-046 WT:A
SPD_SOURCES += spd/lp4x/set-0/spd-1.hex # ID = 1(0b0001) Parts = H9HCNNNBKMMLXR-NEE, K4U6E3S4AA-MGCR, MT53E512M32D2NP-046 WT:E, MT53E512M32D1NP-046 WT:B
SPD_SOURCES += spd/lp4x/set-0/spd-3.hex # ID = 2(0b0010) Parts = H9HCNNNCPMMLXR-NEE, K4UBE3D4AA-MGCR, MT53E1G32D2NP-046 WT:B
SPD_SOURCES += spd/lp4x/set-0/spd-1.hex # ID = 1(0b0001) Parts = H9HCNNNBKMMLXR-NEE, K4U6E3S4AA-MGCR, MT53E512M32D2NP-046 WT:E, MT53E512M32D1NP-046 WT:B, H54G46CYRBX267, K4U6E3S4AB-MGCL
SPD_SOURCES += spd/lp4x/set-0/spd-3.hex # ID = 2(0b0010) Parts = H9HCNNNCPMMLXR-NEE, K4UBE3D4AA-MGCR, MT53E1G32D2NP-046 WT:B, H54G56CYRBX247, K4UBE3D4AB-MGCL
SPD_SOURCES += spd/lp4x/set-0/spd-2.hex # ID = 3(0b0011) Parts = H9HCNNNFAMMLXR-NEE
SPD_SOURCES += spd/lp4x/set-0/spd-7.hex # ID = 4(0b0100) Parts = MT53E2G32D4NQ-046 WT:A

6
src/mainboard/google/brya/variants/anahera/memory/dram_id.generated.txt
View File

@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-or-later
# This is an auto-generated file. Do not edit!!
# Generated by:
# util/spd_tools/bin/part_id_gen ADL lp4x src/mainboard/google/brya/variants/anahera/memory src/mainboard/google/brya/variants/anahera/memory/mem_parts_used.txt
# ./util/spd_tools/lp4x/part_id_gen ADL lp4x src/mainboard/google/brya/variants/anahera/memory src/mainboard/google/brya/variants/anahera/memory/mem_parts_used.txt
DRAM Part Name ID to assign
MT53E1G32D2NP-046 WT:A 0 (0000)
@ -14,3 +14,7 @@ H9HCNNNFAMMLXR-NEE 3 (0011)
MT53E2G32D4NQ-046 WT:A 4 (0100)
MT53E512M32D1NP-046 WT:B 1 (0001)
MT53E1G32D2NP-046 WT:B 2 (0010)
H54G46CYRBX267 1 (0001)
K4U6E3S4AB-MGCL 1 (0001)
H54G56CYRBX247 2 (0010)
K4UBE3D4AB-MGCL 2 (0010)

4
src/mainboard/google/brya/variants/anahera/memory/mem_parts_used.txt
View File

@ -8,3 +8,7 @@ H9HCNNNFAMMLXR-NEE
MT53E2G32D4NQ-046 WT:A
MT53E512M32D1NP-046 WT:B
MT53E1G32D2NP-046 WT:B
H54G46CYRBX267
K4U6E3S4AB-MGCL
H54G56CYRBX247
K4UBE3D4AB-MGCL

6
src/mainboard/google/brya/variants/anahera4es/memory/Makefile.inc
View File

@ -1,11 +1,11 @@
# SPDX-License-Identifier: GPL-2.0-or-later
# This is an auto-generated file. Do not edit!!
# Generated by:
# util/spd_tools/bin/part_id_gen ADL lp4x src/mainboard/google/brya/variants/anahera/memory src/mainboard/google/brya/variants/anahera/memory/mem_parts_used.txt
# ./util/spd_tools/lp4x/part_id_gen ADL lp4x src/mainboard/google/brya/variants/anahera4es/memory src/mainboard/google/brya/variants/anahera4es/memory/mem_parts_used.txt
SPD_SOURCES =
SPD_SOURCES += spd/lp4x/set-0/spd-4.hex # ID = 0(0b0000) Parts = MT53E1G32D2NP-046 WT:A
SPD_SOURCES += spd/lp4x/set-0/spd-1.hex # ID = 1(0b0001) Parts = H9HCNNNBKMMLXR-NEE, K4U6E3S4AA-MGCR, MT53E512M32D2NP-046 WT:E, MT53E512M32D1NP-046 WT:B
SPD_SOURCES += spd/lp4x/set-0/spd-3.hex # ID = 2(0b0010) Parts = H9HCNNNCPMMLXR-NEE, K4UBE3D4AA-MGCR, MT53E1G32D2NP-046 WT:B
SPD_SOURCES += spd/lp4x/set-0/spd-1.hex # ID = 1(0b0001) Parts = H9HCNNNBKMMLXR-NEE, K4U6E3S4AA-MGCR, MT53E512M32D2NP-046 WT:E, MT53E512M32D1NP-046 WT:B, H54G46CYRBX267, K4U6E3S4AB-MGCL
SPD_SOURCES += spd/lp4x/set-0/spd-3.hex # ID = 2(0b0010) Parts = H9HCNNNCPMMLXR-NEE, K4UBE3D4AA-MGCR, MT53E1G32D2NP-046 WT:B, H54G56CYRBX247, K4UBE3D4AB-MGCL
SPD_SOURCES += spd/lp4x/set-0/spd-2.hex # ID = 3(0b0011) Parts = H9HCNNNFAMMLXR-NEE
SPD_SOURCES += spd/lp4x/set-0/spd-7.hex # ID = 4(0b0100) Parts = MT53E2G32D4NQ-046 WT:A

6
src/mainboard/google/brya/variants/anahera4es/memory/dram_id.generated.txt
View File

@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-or-later
# This is an auto-generated file. Do not edit!!
# Generated by:
# util/spd_tools/bin/part_id_gen ADL lp4x src/mainboard/google/brya/variants/anahera/memory src/mainboard/google/brya/variants/anahera/memory/mem_parts_used.txt
# ./util/spd_tools/lp4x/part_id_gen ADL lp4x src/mainboard/google/brya/variants/anahera4es/memory src/mainboard/google/brya/variants/anahera4es/memory/mem_parts_used.txt
DRAM Part Name ID to assign
MT53E1G32D2NP-046 WT:A 0 (0000)
@ -14,3 +14,7 @@ H9HCNNNFAMMLXR-NEE 3 (0011)
MT53E2G32D4NQ-046 WT:A 4 (0100)
MT53E512M32D1NP-046 WT:B 1 (0001)
MT53E1G32D2NP-046 WT:B 2 (0010)
H54G46CYRBX267 1 (0001)
K4U6E3S4AB-MGCL 1 (0001)
H54G56CYRBX247 2 (0010)
K4UBE3D4AB-MGCL 2 (0010)

4
src/mainboard/google/brya/variants/anahera4es/memory/mem_parts_used.txt
View File

@ -8,3 +8,7 @@ H9HCNNNFAMMLXR-NEE
MT53E2G32D4NQ-046 WT:A
MT53E512M32D1NP-046 WT:B
MT53E1G32D2NP-046 WT:B
H54G46CYRBX267
K4U6E3S4AB-MGCL
H54G56CYRBX247
K4UBE3D4AB-MGCL