soc/amd: factor out check_mca to common code
Change-Id: I139d1fe41bad5213da8890c2867f275b6847e3e1 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56281 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -50,6 +50,7 @@ config SOC_SPECIFIC_OPTIONS
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select SOC_AMD_COMMON_BLOCK_IOMMU
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select SOC_AMD_COMMON_BLOCK_IOMMU
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select SOC_AMD_COMMON_BLOCK_LPC
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select SOC_AMD_COMMON_BLOCK_LPC
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select SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA
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select SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA
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select SOC_AMD_COMMON_BLOCK_MCAX
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select SOC_AMD_COMMON_BLOCK_NONCAR
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select SOC_AMD_COMMON_BLOCK_NONCAR
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select SOC_AMD_COMMON_BLOCK_PCI
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select SOC_AMD_COMMON_BLOCK_PCI
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select SOC_AMD_COMMON_BLOCK_PCI_MMCONF
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select SOC_AMD_COMMON_BLOCK_PCI_MMCONF
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@ -1,18 +1,8 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <amdblocks/mca.h>
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#include <amdblocks/mca.h>
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#include <cpu/x86/msr.h>
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static void mca_check_all_banks(void)
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void mca_check_all_banks(void)
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{
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{
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/* TODO: Implement MCAX register checking and BERT table generation. */
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/* TODO: Implement MCAX register checking and BERT table generation. */
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}
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}
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/* Check the Machine Check Architecture Extension registers */
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void check_mca(void)
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{
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mca_check_all_banks();
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/* mca_clear_status uses the MCA registers and not the MCAX ones. Since they are
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aliases, we can use either set of registers. */
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mca_clear_status();
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}
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@ -26,6 +26,26 @@ config MEMLAYOUT_LD_FILE
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endif # SOC_AMD_COMMON_BLOCK_NONCAR
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endif # SOC_AMD_COMMON_BLOCK_NONCAR
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config SOC_AMD_COMMON_BLOCK_MCA_COMMON
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bool
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help
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Add common machine check architecture support. Do not select this
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in the SoC's Kconfig; select either SOC_AMD_COMMON_BLOCK_MCA or
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SOC_AMD_COMMON_BLOCK_MCAX which will select this one.
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config SOC_AMD_COMMON_BLOCK_MCA
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bool
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select SOC_AMD_COMMON_BLOCK_MCA_COMMON
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help
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Add IA32 machine check architecture (MCA) support for pre-Zen CPUs.
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config SOC_AMD_COMMON_BLOCK_MCAX
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bool
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select SOC_AMD_COMMON_BLOCK_MCA_COMMON
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help
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Add extended machine check architecture (MCAX) support for AMD family
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17h, 19h and possibly newer CPUs.
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config SOC_AMD_COMMON_BLOCK_SMM
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config SOC_AMD_COMMON_BLOCK_SMM
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bool
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bool
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help
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help
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@ -0,0 +1 @@
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ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_MCA_COMMON) += mca_common.c
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@ -0,0 +1,12 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <amdblocks/mca.h>
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#include <cpu/x86/msr.h>
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void check_mca(void)
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{
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mca_check_all_banks();
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/* mca_clear_status uses the MCA registers which can be used in both the MCA and MCAX
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case */
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mca_clear_status();
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}
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@ -4,5 +4,6 @@
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#define AMD_BLOCK_MCA_H
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#define AMD_BLOCK_MCA_H
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void check_mca(void);
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void check_mca(void);
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void mca_check_all_banks(void);
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#endif /* AMD_BLOCK_MCA_H */
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#endif /* AMD_BLOCK_MCA_H */
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@ -41,6 +41,7 @@ config CPU_SPECIFIC_OPTIONS
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select SOC_AMD_COMMON_BLOCK_I2C
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select SOC_AMD_COMMON_BLOCK_I2C
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select SOC_AMD_COMMON_BLOCK_IOMMU
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select SOC_AMD_COMMON_BLOCK_IOMMU
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select SOC_AMD_COMMON_BLOCK_LPC
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select SOC_AMD_COMMON_BLOCK_LPC
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select SOC_AMD_COMMON_BLOCK_MCAX
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select SOC_AMD_COMMON_BLOCK_NONCAR
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select SOC_AMD_COMMON_BLOCK_NONCAR
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select SOC_AMD_COMMON_BLOCK_PCI
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select SOC_AMD_COMMON_BLOCK_PCI
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select SOC_AMD_COMMON_BLOCK_PCIE_GPP_DRIVER
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select SOC_AMD_COMMON_BLOCK_PCIE_GPP_DRIVER
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@ -192,7 +192,7 @@ static void mca_print_error(unsigned int bank)
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printk(BIOS_WARNING, " MC%u_CTL_MASK = %08x_%08x\n", bank, msr.hi, msr.lo);
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printk(BIOS_WARNING, " MC%u_CTL_MASK = %08x_%08x\n", bank, msr.hi, msr.lo);
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}
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}
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static void mca_check_all_banks(void)
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void mca_check_all_banks(void)
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{
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{
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struct mca_bank_status mci;
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struct mca_bank_status mci;
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const unsigned int num_banks = mca_get_bank_count();
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const unsigned int num_banks = mca_get_bank_count();
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@ -214,12 +214,3 @@ static void mca_check_all_banks(void)
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}
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}
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}
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}
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}
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}
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/* Check the Machine Check Architecture Extension registers */
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void check_mca(void)
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{
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mca_check_all_banks();
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/* mca_clear_status uses the MCA registers and not the MCAX ones. Since they are
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aliases, we can use either set of registers. */
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mca_clear_status();
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}
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@ -33,6 +33,7 @@ config CPU_SPECIFIC_OPTIONS
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select SOC_AMD_COMMON_BLOCK_I2C
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select SOC_AMD_COMMON_BLOCK_I2C
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select SOC_AMD_COMMON_BLOCK_IOMMU
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select SOC_AMD_COMMON_BLOCK_IOMMU
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select SOC_AMD_COMMON_BLOCK_LPC
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select SOC_AMD_COMMON_BLOCK_LPC
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select SOC_AMD_COMMON_BLOCK_MCA
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select SOC_AMD_COMMON_BLOCK_PCI
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select SOC_AMD_COMMON_BLOCK_PCI
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select SOC_AMD_COMMON_BLOCK_PI
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select SOC_AMD_COMMON_BLOCK_PI
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select SOC_AMD_COMMON_BLOCK_PM
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select SOC_AMD_COMMON_BLOCK_PM
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@ -179,7 +179,7 @@ static void mca_print_error(unsigned int bank)
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printk(BIOS_WARNING, " MC%u_CTL_MASK = %08x_%08x\n", bank, msr.hi, msr.lo);
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printk(BIOS_WARNING, " MC%u_CTL_MASK = %08x_%08x\n", bank, msr.hi, msr.lo);
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}
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}
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static void mca_check_all_banks(void)
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void mca_check_all_banks(void)
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{
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{
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struct mca_bank_status mci;
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struct mca_bank_status mci;
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const unsigned int num_banks = mca_get_bank_count();
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const unsigned int num_banks = mca_get_bank_count();
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@ -201,9 +201,3 @@ static void mca_check_all_banks(void)
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}
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}
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}
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}
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}
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}
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void check_mca(void)
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{
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mca_check_all_banks();
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mca_clear_status();
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}
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