diff --git a/src/soc/amd/common/block/psp/Kconfig b/src/soc/amd/common/block/psp/Kconfig
index c5ec56015b..7ef7e40b3b 100644
--- a/src/soc/amd/common/block/psp/Kconfig
+++ b/src/soc/amd/common/block/psp/Kconfig
@@ -27,3 +27,11 @@ config SOC_AMD_PSP_SELECTABLE_SMU_FW
 	  and each mainboard can choose to select an appropriate fanless or
 	  fanned set of blobs.  Ask your AMD representative whether your APU
 	  is considered fanless.
+
+config AMD_SOC_SEPARATE_EFS_SECTION
+	bool
+	help
+	  Use separate EFS FMAP section instead of putting EFS into CBFS. The
+	  FMAP section must begin exactly at the location the EFS needs to be
+	  placed in the flash. This option can be used to place the EFS right
+	  after the 128kByte EC firmware at the beginning of the flash.
diff --git a/src/soc/amd/common/block/psp/Makefile.inc b/src/soc/amd/common/block/psp/Makefile.inc
index 94dc57ca8f..5bae663021 100644
--- a/src/soc/amd/common/block/psp/Makefile.inc
+++ b/src/soc/amd/common/block/psp/Makefile.inc
@@ -6,6 +6,7 @@ smm-y += psp.c
 smm-y += psp_smm.c
 
 bootblock-y += psp_efs.c
+bootblock-$(CONFIG_AMD_SOC_SEPARATE_EFS_SECTION) += efs_fmap_check.c
 verstage-y += psp_efs.c
 
 endif # CONFIG_SOC_AMD_COMMON_BLOCK_PSP
diff --git a/src/soc/amd/common/block/psp/efs_fmap_check.c b/src/soc/amd/common/block/psp/efs_fmap_check.c
new file mode 100644
index 0000000000..44dfe70ee0
--- /dev/null
+++ b/src/soc/amd/common/block/psp/efs_fmap_check.c
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <amdblocks/psp_efs.h>
+#include <assert.h>
+#include <fmap_config.h>
+#include <soc/iomap.h>
+
+_Static_assert(FMAP_SECTION_EFS_START == (FLASH_BASE_ADDR + EFS_OFFSET),
+	"FMAP EFS Offset does not match EFS Offset - check your config");