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soc/amd/common/block/lpc: Reorganize LPC enable resources 

This change moves all the logic for setting up decode windows for LPC
under configure_child_lpc_windows() which is called from
lpc_enable_children_resources(). This is in preparation to configure
decode windows for eSPI differently if mainboard decides to use eSPI
instead of LPC.

Side-effect of this change is that the IO decode registers are written
after each child device resources are considered.

BUG=b:154445472

Change-Id: Ib8275bc4ce51cd8afd390901ac723ce71c7a9148
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41070
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Furquan Shaikh 2020-05-04 21:22:22 -07:00
parent efe27cf3f9
commit 1e279a5cb2
1 changed files with 26 additions and 31 deletions
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57
src/soc/amd/common/block/lpc/lpc.c
View File

@ -145,13 +145,17 @@ static void lpc_set_resources(struct device *dev)
pci_dev_set_resources(dev);
}
static void set_child_resource(struct device *dev, struct device *child,
u32 *reg, u32 *reg_x)
static void configure_child_lpc_windows(struct device *dev, struct device *child)
{
struct resource *res;
u32 base, end;
u32 rsize = 0, set = 0, set_x = 0;
int wideio_index;
u32 reg, reg_x;
reg = pci_read_config32(dev, LPC_IO_PORT_DECODE_ENABLE);
reg_x = pci_read_config32(dev, LPC_IO_OR_MEM_DECODE_ENABLE);
/*
* Be a bit relaxed, tolerate that LPC region might be bigger than
@ -248,16 +252,15 @@ static void set_child_resource(struct device *dev, struct device *child,
}
/* check if region found and matches the enable */
if (res->size <= rsize) {
*reg |= set;
*reg_x |= set_x;
reg |= set;
reg_x |= set_x;
/* check if we can fit resource in variable range */
} else {
wideio_index = lpc_set_wideio_range(base, res->size);
if (wideio_index != WIDEIO_RANGE_ERROR) {
/* preserve wide IO related bits. */
*reg_x = pci_read_config32(dev,
reg_x = pci_read_config32(dev,
LPC_IO_OR_MEM_DECODE_ENABLE);
printk(BIOS_DEBUG,
"Range assigned to wide IO %d\n",
wideio_index);
@ -270,39 +273,31 @@ static void set_child_resource(struct device *dev, struct device *child,
}
}
}
}
/**
* @brief Enable resources for children devices
*
* @param dev the device whose children's resources are to be enabled
*
*/
static void lpc_enable_childrens_resources(struct device *dev)
{
struct bus *link;
u32 reg, reg_x;
reg = pci_read_config32(dev, LPC_IO_PORT_DECODE_ENABLE);
reg_x = pci_read_config32(dev, LPC_IO_OR_MEM_DECODE_ENABLE);
for (link = dev->link_list; link; link = link->next) {
struct device *child;
for (child = link->children; child;
child = child->sibling) {
if (child->enabled
&& (child->path.type == DEVICE_PATH_PNP))
set_child_resource(dev, child, &reg, &reg_x);
}
}
pci_write_config32(dev, LPC_IO_PORT_DECODE_ENABLE, reg);
pci_write_config32(dev, LPC_IO_OR_MEM_DECODE_ENABLE, reg_x);
}
static void lpc_enable_children_resources(struct device *dev)
{
struct bus *link;
struct device *child;
for (link = dev->link_list; link; link = link->next) {
for (child = link->children; child; child = child->sibling) {
if (!child->enabled)
continue;
if (child->path.type != DEVICE_PATH_PNP)
continue;
configure_child_lpc_windows(dev, child);
}
}
}
static void lpc_enable_resources(struct device *dev)
{
pci_dev_enable_resources(dev);
lpc_enable_childrens_resources(dev);
lpc_enable_children_resources(dev);
}
static struct device_operations lpc_ops = {