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nb/intel/gm45: Fix native text mode initialization 

The LVDS port is configured to accept data from pipe A, but the panel
fitter and VGA were attached to pipe B.

Changes to VGACNTRL:
- select pipe A instead of pipe B.
- disable VGA centering to fix jitter.

TEST=Build and run on Thinkpad X200 in both text and framebuffer modes.

Change-Id: I2356f264580d8b021952c217de3477291d866f98
Signed-off-by: Nick High <nhigh@openmailbox.org>
Reviewed-on: https://review.coreboot.org/14524
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
This commit is contained in:
Nick High 2016-04-26 17:22:05 -04:00 committed by Martin Roth
parent 564dc9c7c8
commit 1e302cbd09
1 changed files with 3 additions and 3 deletions
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6
src/northbridge/intel/gm45/gma.c
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@ -340,7 +340,7 @@ static void intel_gma_init(const struct northbridge_intel_gm45_config *info,
write32(mmio + PIPESRC(0), (639 << 16) | 399);
write32(mmio + PF_CTL(0), PF_ENABLE | PF_FILTER_MED_3x3);
write32(mmio + PF_WIN_SZ(0), vactive | (hactive << 16));
write32(mmio + PFIT_CONTROL, 0xa0000000);
write32(mmio + PFIT_CONTROL, 0x80000000);
}
mdelay(1);
@ -362,12 +362,12 @@ static void intel_gma_init(const struct northbridge_intel_gm45_config *info,
write32(mmio + PIPECONF(0), PIPECONF_ENABLE | PIPECONF_BPP_6 | PIPECONF_DITHER_EN);
if (IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)) {
write32(mmio + VGACNTRL, 0x22c4008e | VGA_DISP_DISABLE);
write32(mmio + VGACNTRL, 0xc4008e | VGA_DISP_DISABLE);
write32(mmio + DSPCNTR(0), DISPLAY_PLANE_ENABLE
| DISPPLANE_BGRX888);
mdelay(1);
} else {
write32(mmio + VGACNTRL, 0x22c4008e);
write32(mmio + VGACNTRL, 0xc4008e);
}
write32(mmio + TRANS_HTOTAL(0),