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sb/intel/common: Fix i2c block command 

Coding style, sync implementation with SMBus counterpart.

Change-Id: I75f24e2308de945fc03289636ae914bb87070838
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21116
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Kyösti Mälkki 2017-08-20 21:36:03 +03:00
parent c17e855da0
commit 1e39236f96
2 changed files with 13 additions and 6 deletions
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15
src/southbridge/intel/common/smbus.c
View File

@ -337,7 +337,7 @@ int do_smbus_block_write(unsigned int smbus_base, u8 device, u8 cmd,
/* Only since ICH5 */
int do_i2c_block_read(unsigned int smbus_base, u8 device,
unsigned int offset, u32 bytes, u8 *buf)
unsigned int offset, const unsigned int bytes, u8 *buf)
{
u8 status;
int bytes_read = 0;
@ -379,18 +379,25 @@ int do_i2c_block_read(unsigned int smbus_base, u8 device,
return SMBUS_ERROR;
if (status & SMBHSTSTS_BYTE_DONE) {
*buf = inb(smbus_base + SMBBLKDAT);
buf++;
if (bytes_read < bytes) {
*buf++ = inb(smbus_base + SMBBLKDAT);
bytes_read++;
if (--bytes == 1) {
}
if (bytes_read + 1 >= bytes) {
/* indicate that next byte is the last one */
outb(inb(smbus_base + SMBHSTCTL)
| SMBHSTCNT_LAST_BYTE,
smbus_base + SMBHSTCTL);
}
outb(status, smbus_base + SMBHSTSTAT);
}
} while ((status & SMBHSTSTS_HOST_BUSY) && loops);
if (bytes_read < bytes)
return SMBUS_ERROR;
return bytes_read;
}

2
src/southbridge/intel/common/smbus.h
View File

@ -42,5 +42,5 @@ int do_smbus_block_write(unsigned int smbus_base, u8 device,
u8 cmd, unsigned int bytes, const u8 *buf);
/* Only since ICH5 */
int do_i2c_block_read(unsigned int smbus_base, u8 device,
unsigned int offset, u32 bytes, u8 *buf);
unsigned int offset, unsigned int bytes, u8 *buf);
#endif